參數(shù)資料
型號(hào)： MC74LCX00SD
廠商： ON SEMICONDUCTOR
元件分類： 門電路
英文描述： 15 A 12-V Input Bus Termination Power Module for DDR/QDR Memory 10-DIP MODULE -40 to 85
中文描述： LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14
封裝： PLASTIC, SSOP-14
文件頁(yè)數(shù)： 4/40頁(yè)
文件大?。?/td> 350K
代理商： MC74LCX00SD
LCX Family Specifications
MOTOROLA
LCX DATA
BR1339 — REV 3
10
Test Conditions
Figure 5 describes the input signal voltage levels to be
used when testing LCX circuits. The AC test conditions follow
industry convention requiring VIN to range from 0 V for a logic
LOW to 2.7V for a logic HIGH. The DC parameters are
normally tested with VI at guaranteed input levels, that is VIH
to VIL (see datasheets for details). Care must be taken to
adequately decouple these high performance parts and to
protect the test signals from electrical noise. In an electrically
noisy environment, (e.g., a tester and handler not specifically
designed for high speed work), DC input levels may need
adjustment to increase the noise margin allowance for the
tester. This noise will not likely be seen in a system
environment.
Noise immunity testing is performed by raising VI to the
nominal supply voltage of 3.3V then dropping to a level
corresponding to VIH characteristics, and then raising it again
to the 3.3V level. Noise tests are performed on the VIL
characteristics by raising VI from 0 V to VIL, then returning to
0 V. Both VIH and VIL noise immunity tests should not induce
a switch condition on the appropriate outputs of the LCX
device.
Good high frequency wiring practices should be used in
constructing test jigs. Leads on the load capacitor should be
as short as possible to minimize ripples on the output wave
form transitions and to minimize undershoot. Generous
ground metal (preferably a ground plane) should be used for
the same reasons. A VCC bypass capacitor should be
provided at the test socket, also with minimum lead lengths.
Rise and Fall Times
Input signals should have rise and fall times of 2.5ns or less
(10% to 90%), and signal swing of 0V to 2.7V. Rise and fall
times less than or equal to 1ns should be used for testing fmax
or pulse widths.
CMOS devices tend to oscillate when the input rise and fall
times become lengthy. As a direct result of its increased
performance, LCX devices can be more sensitive to slow input
rise and fall times than other lower performance technologies.
Recommended edge rate is
≤10ns/V.
It is important to understand why this oscillation occurs.
Consider the outputs, where the problem is initiated. Usually,
CMOS outputs drive capacitive loads with low DC leakage.
When the output changes from a HIGH level to a LOW level,
or from a LOW level to a HIGH level, this capacitance is
charged or discharged. With the present high performance
technologies, charging or discharging takes place in a very
short time, typically 2–3ns. The requirement to charge or
discharge the capacitive loads quickly creates a condition
where the instantaneous current change through the output
structure is quite high. A voltage is generated across the VCC
or ground leads inside the package due to the lead
inductance. The internal ground of the chip will change in
reference to the outside world because of this induced
voltage.
Next, consider the inputs. If the internal ground changes,
the input voltage level appears to change to the DUT. If the
input rise time is slow enough, its level might still be in the
threshold region, or very close to it, when the output switches.
If the internally–induced voltage is large enough, it is possible
to shift the threshold enough so that it re–crosses the input
level. If the gain of the device is sufficient and the input rise or
fall time is slow enough, then the device may go into
oscillation. As device propagation delays become shorter, the
inputs will have less time to rise or fall through the threshold
region. As device gains increase, the outputs will swing more,
creating more induced voltage. Instantaneous current change
will be greater as outputs become quicker, generating more
induced voltage.
Package–related causes of output oscillation are not
entirely to blame for problems with input rise and fall time
measurements. All testers have VCC and ground leads with
some finite inductance. This inductance must be added to the
inductance of the package to determine the overall voltage
which will be induced when the outputs change. As the
reference for the input signals moves further away from the pin
under test, the test will be more susceptible to problems
caused by the inductance of the leads and stray noise. Any
noise on the input signal will also cause problems.
Enable and Disable Times
Figure 9 and Figure 10 show that the disable times are
measured at the point where the output voltage has risen or
fallen by 0.3V from the voltage rail level (i.e., ground for tPLZ
or VCC for tPHZ). This change enhances the repeatability of
measurements, reduces test times, and gives the system
designer more realistic delay times to use in calculating
minimum cycle times. Since the high–impedance state rising
or falling waveform is RC–controlled, the first 0.3V of change
is more linear and is less susceptible to external influences.
More importantly, perhaps from the system designer’s point of
view, a change in voltage of 0.3V is adequate to ensure that
a device output has turned OFF. Measuring to a larger change
in voltage merely exaggerates the apparent Disable time
artificially penalizing system performance (since the designer
must use the Enable and Disable times to figure worst case
timing.)
Propagation Delay, fmax, Set, Hold, and
Recovery Times
A 1 MHz square wave is recommended for most
propagation delay tests. The repetition rate must necessarily
be increased for testing fmax. A 50% duty cycle should always
be used when testing fmax. Two pulse generators are usually
required for testing such parameters as setup time (ts), hold
time (th), recovery time (tREC) shown in Figure 8.
Electrostatic Discharge
Precautions should be taken to prevent damage to devices
by electrostatic discharge. Static charge tends to accumulate
on insulated surfaces such as synthetic fabrics or carpeting,
plastic sheets, trays, foam, tubes or bags, and on ungrounded
electrical tools or appliances. The problem is much worse in
a dry atmosphere. In general, it is recommended that
individuals take the precaution of touching a known ground
before handling devices. To effectively avoid electrostatic
damage to LCX devices, it is recommended that individuals
wear a grounded wrist strap when handling devices. More
often, handling equipment, which is not properly grounded,
causes damage to parts. Ensure that all plastic parts of the
tester, which are near the device, are conductive and
connected to ground.
相關(guān)PDF資料
PDF描述
MC74LCX02D 15 A 12-V Input Bus Termination Power Module for DDR/QDR Memory 10-DIP MODULE -40 to 85
MC74LCX02M 0.8 to 1.8 V 18-A, 12-V Input Non-Isolated Wide-Adjust Module 10-DIP MODULE -40 to 85
MC74LCX02 15 A 12-V Input Bus Termination Power Module for DDR/QDR Memory 10-DIP MODULE -40 to 85
MC74LCX540DWR2 LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20
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MC74LCX02D 功能描述:邏輯門 2-3.6V Quad 2-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
MC74LCX02DG 功能描述:邏輯門 2-3.6V Quad 2-Input NOR RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
MC74LCX02DR2 功能描述:邏輯門 2-3.6V Quad 2-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
MC74LCX02DR2G 功能描述:邏輯門 2-3.6V Quad 2-Input NOR RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
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