參數(shù)資料
型號： MC68LC060RC66
廠商： Freescale Semiconductor
文件頁數(shù)： 35/128頁
文件大?。?/td> 0K
描述： IC MPU 32BIT 66MHZ 206-PGA
標準包裝： 10
系列： M680x0
處理器類型： M680x0 32-位
速度： 66MHz
電壓： 3.3V
安裝類型： 通孔
封裝/外殼： 206-BEPGA
供應(yīng)商設(shè)備封裝： 206-PGA（47.25x47.25）
包裝： 托盤
Table of Contents
xvi
M68060 USER’S MANUAL
MOTOROLA
10.1.3
Dispatch Test 3: Allowable Effective Addressing Mode in the sOEP ....... 10-8
10.1.4
Dispatch Test 4: Allowable Operand Data Memory Reference ................ 10-8
10.1.5
Dispatch Test 5: No Register Conflicts on sOEP.AGU Resources .......... 10-8
10.1.6
Dispatch Test 6: No Register Conflicts on sOEP.IEE Resources ............ 10-9
10.2
Timing Assumptions ................................................................................. 10-10
10.3
Cache and ATC Performance Degradation Times ................................... 10-12
10.3.1
Instruction ATC Miss .............................................................................. 10-12
10.3.2
Data ATC Miss ....................................................................................... 10-13
10.3.3
Instruction Cache Miss ........................................................................... 10-13
10.3.4
Data Cache Miss .................................................................................... 10-13
10.4
Effective Address Calculation Times ........................................................ 10-14
10.5
Move Instruction Execution Times............................................................ 10-14
10.6
Standard Instruction Execution Times ...................................................... 10-16
10.7
Immediate Instruction Execution Times.................................................... 10-17
10.8
Single-Operand Instruction Execution Times ........................................... 10-18
10.9
Shift/Rotate Execution Times ................................................................... 10-19
10.10
Bit Manipulation and Bit Field Execution Times........................................ 10-19
10.11
Branch Instruction Execution Times ......................................................... 10-21
10.12
LEA, PEA, and MOVEM Execution Times................................................ 10-22
10.13
Multiprecision Instruction Execution Times............................................... 10-22
10.14
Status Register, MOVES, and Miscellaneous
Instruction Execution Times...................................................................... 10-22
10.15
FPU Instruction Execution Times ............................................................. 10-24
10.16
Exception Processing Times .................................................................... 10-26
Section 11
Applications Information
11.1
Guidelines for Porting Software to the MC68060 ....................................... 11-1
11.1.1
User Code ................................................................................................ 11-1
11.1.2
Supervisor Code ....................................................................................... 11-1
11.1.2.1
Initialization Code (Reset Exception Handler) ........................................ 11-2
11.1.2.1.1
Processor Configuration Register (PCR) (MOVEC of PCR). ............... 11-2
11.1.2.1.2
Default Transparent Translation Register (MOVEC of TCR) ............... 11-2
11.1.2.1.3
MC68060 Software Package (M68060SP). ......................................... 11-2
11.1.2.1.4
Cache Control Register (CACR) (MOVEC of CACR).......................... 11-3
11.1.2.1.5
Resource Checking (Access Error Handler) ........................................ 11-3
11.1.2.2
Virtual Memory Software ........................................................................ 11-3
11.1.2.2.1
Translation Control Register (MOVEC of TCR).................................... 11-3
11.1.2.2.2
Descriptors in Cacheable Copyback Pages Prohibited........................ 11-4
11.1.2.2.3
Page and Descriptor Faults (Access Error Handler). ........................... 11-4
11.1.2.2.4
PTEST, MOVEC of MMUSR, and PLPA.............................................. 11-4
11.1.2.3
Context Switch Interrupt Handlers.......................................................... 11-5
11.1.2.4
Trace Handlers ....................................................................................... 11-5
11.1.2.5
I/O Device Driver Software ..................................................................... 11-5
11.1.3
Precise Vs. Imprecise Exception Mode .................................................... 11-6
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