MOTOROLA
MC68360 USER’S MANUAL
F-1
APPENDIX F
DESIGN CHECKLIST
When integrating the MC68302 into an application, it may be helpful to go through the fol-
lowing design checklist. In this checklist are a number of common problems and their reso-
lutions that have been found while debugging real MC68302 applications.
1.
Version, Mask
Older versions of the MC68302—called Rev A and Rev B with masks “B14M” written
on the device—do not contain all the features listed in this manual. These devices
have ceased production and are longer available. A newer version called Rev C, which
is identified by mask number “C65T” or later, contains all the features listed in this
manual. The missing features in the old versions include clock output control and a few
other minor differences.
External Pin Configurations
A good checklist of external pin configurations may be found in D.1 Minimum System
Configuration. Common problems are also listed in some of the following paragraphs.
Clock Present
If you are using an external clock source to the 68302, make sure that it is driving the
clock input within 10 msec of powerup. Otherwise, part damage can occur.
AVEC
,
DTACK
If AVEC is not used, it needs to be pulled high (to + 5 V); otherwise, erratic behavior
and bus cycles may occur. A pullup resistor may be used, if desired. If AVEC is used,
it should be asserted instead of DTACK (not in addition to DTACK) during interrupt ac-
knowledge cycles.
Pullup, DTACK
Sometimes a 10K-ohm resistor may not be strong enough to pull up DTACK to provide
adequate rise times to the DTACK signal. This is a loading-dependent issue.
Pullup, Floating BR, FRZ, BUSW
Unexpected behavior can result if the signals BR, FRZ, BUSW, or other inputs are left
floating. Of these, the most common mistake is to leave FRZ floating.
If no external requests are made, BR may be pulled directly high. If external requests
are made, BR may need to be pulled high through a resistor, such as 1 K ohm, to guar-
antee adequate BR rise time to meet bus arbitration specifications.
Pullup, lPL
IPL lines should be pulled high if not used. These signals may be pulled directly high,
if desired.
RESET, Rise Time
The rise time of the RESET and HALT pins after a total system reset must be within
2.
3.
4.
5.
6.
7.
8.