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Communications Processor (CP)
MOTOROLA
MC68302 USER’S MANUAL
4-77
W—Wrap (Final BD in Table)
0 = This is not the last BD in the Rx BD table.
1 = This is the last BD in the Rx BD table. After this buffer has been used, the HDLC
controller will receive incoming data into the first BD in the table.
NOTE
The user is required to set the wrap bit in one of the first eight
BDs; otherwise, errant operation may occur.
I—Interrupt
0 = The RXB bit is not set after this buffer has been used, but RXF operation remains
unaffected.
1 = The RXB or RXF bit in the HDLC event register will be set when this buffer has
been used by the HDLC controller, which can cause an interrupt.
The following status bits are written by the HDLC controller after the received data has been
placed into the associated data buffer.
L—Last in Frame
This bit is set by the HDLC controller when this buffer is the last in a frame. This implies
the reception of a closing flag or reception of an error, in which case one or more of the
CD, OV, AB, and LG bits are set. The HDLC controller will write the number of frame oc-
tets to the data length field.
0 = This buffer is not the last in a frame.
1 = This buffer is the last in a frame.
F—First in Frame
This bit is set by the HDLC controller when this buffer is the first in a frame.
0 = The buffer is not the first in a frame.
1 = The buffer is the first in a frame.
Bits 9–6—Reserved for future use.
LG—Rx Frame Length Violation.
A frame length greater than the maximum defined for this channel was recognized (only
the maximum-allowed number of bytes (MFLR) is written to the data buffer). This event
will not be reported until the Rx BD is closed and the RXF bit is set, after receipt of the
closing flag. The actual number of bytes received between flags is written to the data
length field of this BD.
NO—Rx Nonoctet Aligned Frame
A frame that contained a number of bits not exactly divisible by eight was received.
AB—Rx Abort Sequence
A minimum of seven consecutive ones was received during frame reception.