參數(shù)資料
型號： MAX5978ETJ+
廠商： Maxim Integrated
文件頁數(shù)： 25/38頁
文件大小： 2412K
描述： IC CTLR HOT-SWAP 32TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
類型： 熱交換控制器
應(yīng)用： 刀峰式服務(wù)器，網(wǎng)絡(luò)應(yīng)用設(shè)備
內(nèi)部開關(guān)： 無
電流限制： 可調(diào)
電源電壓： 2.7 V ~ 16 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-TQFN-EP（5x5）
包裝： 管件
0 to 16V, Hot-Swap Controller with 10-Bit
Current, Voltage Monitor, and 4 LED Drivers
25
Power-Good Detection and PG Output
The PG output is asserted when the voltage at MON is
between the undervoltage and overvoltage critical limits.
The status of the power-good signal is maintained in
register status3[0]. A value of 1 in the pg[] bit indicates
a power-good condition, regardless of the POL setting,
which only affects the PG output pin polarity. The open-
drain PG output can be configured for active-high or
active-low status indication by the state of the POL input
(see Table 29).
The POL input sets the value of status3[5], which is a
read-only bit; the state of the POL input can be changed
at any time during operation and the polarity of the PG
output changes accordingly.
The assertion of the PG output is delayed by a user-
selectable time delay of 50ms, 100ms, 200ms, or 400ms
(see Tables 30a and 30b).
Table 27. Overvoltage Critical Threshold Register Format (Low-Order Bits)
Table 28. PROT Input and prot[] Bits
Table 29. status3 Register Format
Table 30a. Power-Good Assertion Delay-Time Register Format
Table 30b. Power-Good Assertion Delay
Description:
Overvoltage critical threshold low-order bits [1:0]
Register Title:
ov2thr_lsb
Register Addresses:
0x21
RESET
VALUE
R
R
R
R
R
R/W
R/W
R/W






ov2_1
ov2_0
0x03
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0

PROT INPUT
STATE
prot[1]
prot[0]
UV/OV WARNING
ACTION
UV/OV CRITICAL ACTION
Low
0
0
Assert ALERT
Assert ALERT, clear PG, shut down channel
High
0
1
Assert ALERT
Assert ALERT, clear PG
Unconnected
1
0
Assert ALERT
Assert ALERT
Description:
Power-good status register: POL, ALERT, and power-good bits
Register Title:
status3
Register Address:
0x34
RESET
VALUE
R
R
R
R/W
R
R
R
R


POL
ALERT


Unused
pg[0]

Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0

Description:
Power-good assertion delay-time register
Register Title:
pgdly
Register Address:
0x38
RESET
VALUE
R
R
R
R
R/W
R/W
R/W
R/W




Unused
Unused
pgdly1
pgdly0
0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0

pgdly1
pgdly0
PG ASSERTION DELAY (ms)
0
0
50
0
1
100
1
0
200
1
1
400
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參數(shù)描述
MAX5978ETJ+ 功能描述:熱插拔功率分布 0-16V Hot-Swap Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
MAX5978ETJ+T 功能描述:熱插拔功率分布 0-16V Hot-Swap Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
MAX5980EVKIT# 功能描述:電源開關(guān) IC - POE / LAN MAX5980 Eval Kit RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時(shí)間（最大值）:13 ns 關(guān)閉時(shí)間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6
MAX5980EVKIT+ 功能描述:電源開關(guān) IC - POE / LAN RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時(shí)間（最大值）:13 ns 關(guān)閉時(shí)間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6
MAX5980GTJ+ 功能描述:電源開關(guān) IC - POE / LAN 0-16V Hot-Swap Controller RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時(shí)間（最大值）:13 ns 關(guān)閉時(shí)間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6
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