參數(shù)資料
型號: MAX5978ETJ+
廠商: Maxim Integrated
文件頁數(shù): 17/38頁
文件大?。?/td> 2412K
描述: IC CTLR HOT-SWAP 32TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
類型: 熱交換控制器
應用: 刀峰式服務器,網(wǎng)絡應用設備
內部開關:
電流限制: 可調
電源電壓: 2.7 V ~ 16 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應商設備封裝: 32-TQFN-EP(5x5)
包裝: 管件
0 to 16V, Hot-Swap Controller with 10-Bit
Current, Voltage Monitor, and 4 LED Drivers
17
Setting Circuit-Breaker Thresholds
To select and set the device slow-trip and fast-trip com-
parator thresholds, use the following procedure:
1) Select one of four ratios between the fast-trip thresh-
old and the slow-trip threshold: 200%, 175%, 150%,
or 125%. A system that experiences brief but large
transient load currents should use a higher ratio,
whereas a system that operates continuously at high-
er average load currents might benefit from a smaller
ratio to ensure adequate protection. The ratio is set by
writing to the ifast2slow register. (The default setting
on power-up is 200%.)
2) Determine the slow-trip threshold V
TH,ST
 based on the
anticipated maximum continuous load current during
normal operation, and the value of the current-sense
resistor. The slow-trip threshold should include some
margin (possibly 20%) above the maximum load cur-
rent to prevent spurious circuit-breaker shutdown and
to accommodate passive component tolerances:
 
V
TH,ST
 = R
SENSE
 x I
LOAD,MAX
 x 120%
3) Calculate the necessary fast-trip threshold V
TH,FT
 
based on the ratio set in step 1:
 
V
TH,FT
 = V
TH,ST
 x (ifast2slow ratio)
4) Select one of the three maximum current-sense
ranges: 25mV, 50mV, or 100mV. The current-sense
range is initially set upon power-up by the state of the
IRNG input, but can be altered at any time by writ-
ing to the status2 register. For maximum accuracy
and best measurement resolution, select the lowest
current-sense range that is larger than the V
TH,FT
 
value calculated in step 3.
5) Program the fast-trip and slow-trip thresholds by writ-
ing an 8-bit value to the dac_fast register. This 8-bit
value is determined from the desired V
TH,ST
 value
that was calculated in step 2, the threshold ratio from
step 1, and the current-sense range from step 4:
 
DAC = V
TH,ST
 x 255 x (ifast2slow ratio)/
(IRNG current-sense range)
The device provides a great deal of system flexibil-
ity because the current-sense range, DAC setting, and
threshold ratio can be changed on the fly for systems
that must protect a wide range of interchangeable
load devices, or for systems that control the allocation
of power to smart loads. Table 5 shows the specified
ranges for the fast-trip and slow-trip thresholds for all
combinations of current-sense range and threshold ratio.
When an overcurrent event causes the device to shut
down the power channel, the open-drain FAULT output
alerts the system. Figure 2 shows the operation and fault-
management flowchart.
Table 4a. ifast2slow Register Format
Table 4b. Setting Fast-Trip to Slow-Trip Threshold Ratio
Description:
Current threshold fast-to-slow setting bits
Resister Title:
ifast2slow
Register Address:
0x30
RESET
VALUE
R
R
R
R
R/W
R/W
R/W
R/W




Unused
Unused
FS1
FS0
0x0F
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0

FS1
FS0
FAST-TRIP TO SLOW-TRIP RATIO (%)
0
0
125
0
1
150
1
0
175
1
1
200
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