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參數(shù)資料
| 型號(hào)： | MAX192BMJP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Low-Power, 8-Channel, Serial 10-Bit ADC |
| 中文描述： | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 201K |
| 代理商： | MAX192BMJP |
M
Low-Power, 8-Channel,
S erial 10-Bit ADC
______________________________________________________________________________________
21
* Description :
*
*
*
*
* Roger J .A. Chen, Applications Engineer
* MAXIM Integrated Products
* November 20, 1992
*
******************************************************************************************************************************************************
INCLUDE ‘EQUATES.ASM’ ;Equates for common reg addrs
INCLUDE ‘ORG00000.ASM’ ;initialize reset vector
INCLUDE ‘ORG00008.ASM’ ;initialize interrupt vectors
ORG $0200
;start program after interrupt vectors
INCLUDE ‘INITSYS.ASM’
;set EK=F,XK=0,YK=0,ZK=0
;set sys clock at 16.78 MHz, COP off
INCLUDE ‘INITRAM.ASM’ ;turn on internal SRAM at $10000
;set stack (SK=1, SP=03FE)
MAIN:
J SR INITQSPI
MAINLOOP:
J SR READ192
WAIT:
LDAA SPSR
ANDA #$80
BEQ WAIT
;wait for QSPI to finish
BRA MAINLOOP
ENDPROGRAM:
This is a shell program for using a stand-alone 68HC16 without any external memory. The internal 1K RAM
is put into bank $0F to maintain 68HC11 code compatibility. This program was written with software
provided in the Motorola 68HC16 Evaluation Kit.
INITQSPI:
;This routine sets up the QSPI microsequencer to operate on its own.
;The sequencer will read all eight channels of a MAX192 each time
;it is triggered. The A/D converter results will be left in the
;receive data RAM. Each 16 bit receive data RAM location will
;have a leading zero, 10 + 2 bits of conversion result and three zeros.
;
;Receive RAM Bits 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
;A/D Result 0 MSB LSB 0 0 0
***** Initialize the QSPI Registers ******
PSHA
PSHB
LDAA #%01111000
STAA QPDR
;idle state for PCS0-3 = high
LDAA #%01111011
STAA QPAR
;assign port D to be QSPI
LDAA #%01111110
STAA QDDR
;only MISO is an input
LDD #$8008
STD SPCR0
;master mode,16 bits/transfer,
;CPOL=CPHA=0,1MHz Ser Clock
LDD #$0000
STD SPCR1
;set delay between PCS0 and SCK,
;set delay between transfers
Figure 20. MAX192 Assembly-Code Listing
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