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參數(shù)資料
| 型號： | M37753FFCHP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE CHIP 16 BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION |
| 中文描述： | 單片微機16位CMOS閃存版 |
| 文件頁數(shù)： | 48/67頁 |
| 文件大?。?/td> | 525K |
| 代理商： | M37753FFCHP |
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48
MITSUBISHI MICROCOMPUTERS
M37753FFCFP
M37753FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Data setup time with address stabilized
φ
high-level pulse width,
φ
low-level pulse width
E low-level pulse width
Address output delay time
Address output delay time
Address output delay time
ALE output delay time
ALE pulse width
BHE outupt delay time
R/W output delay time
Address hold time
Address hold time
Data hold time
Floating release delay time
BHE hold time
R/W hold time
Bus timing data formulas
Memory expansion and Microprocessor mode : Low-speed running
(V
CC
= 5 V±10 %, V
SS
= 0 V, T
a
= –20 to 85 °C, f(X
IN
)
≤
25 MHz when
the clock source select bit = “0”
, unless otherwise noted)
8
: f(X
IN
)
≤
12.5 MHz when the clock source select bit = “1”
Note:
When the clock source select bit is “1”, regard f(X
IN
) in tables as 2·f(X
IN
).
4-
φ
access
Symbol
t
su(An/A–D)
t
w
(φ
H)
,t
w(
φ
L)
t
w(EL)
t
d(An–E)
t
d(A–E)
t
d(A–ALE)
t
d(E–ALE)
t
w(ALE)
t
d(BHE–E)
t
d(R/W–E)
t
h(E–An)
t
h(ALE–A)
t
h(E–DQ)
t
pzx(E–DZ)
t
d(E–BHE)
t
d(E–R/W)
Parameter
2-
φ
access
3-
φ
access
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
5
×
10
9
f(X
IN
)
–65
4
×
10
9
f(X
IN
)
–25
7
×
10
9
f(X
IN
)
–65
3
×
10
9
f(X
IN
)
3
×
10
9
f(X
IN
)
2
×
10
9
f(X
IN
)
–28
–28
–28
2
×
10
9
f(X
IN
)
3
×
10
9
f(X
IN
)
3
×
10
9
f(X
IN
)
–18
–25
–25
1
×
10
9
f(X
IN
)
–15
3
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
2
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
–65
–20
–25
–28
–28
–35
–20
–18
–25
–25
–30
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
1
×
10
9
f(X
IN
)
–22
–22
–30
–30
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