參數(shù)資料
型號： M37274MA
廠商： Mitsubishi Electric Corporation
英文描述： Single Chip 8 Bits Microcomputer(8位單片機(jī))
中文描述： 單芯片8位單片機(jī)（8位單片機(jī)）
文件頁數(shù)： 90/131頁
文件大小： 2049K
代理商： M37274MA
90
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274MA-XXXSP
PRELIMINARY
Notice: This is not a final specification.
Some paramentic limits are subject to change.
MITSUBISHI MICROCOMPUTERS
A-D CONVERTER CHARACTERISTICS
(V
CC
= 5 V
±
10 %, V
SS
= 0 V, f(X
IN
) = 8 MHz, T
a
= –10
°
C to 70
°
C, unless otherwise noted)
Resolution
Non-linearity error
Differential non-linearity error
Zero transition error
Full-scale transition error
Conversion time
Reference voltage
Ladder resistor
Analog input current
Max.
8
±
2
±
0.9
2
4
12.5
V
CC
V
REF
bits
LSB
LSB
LSB
LSB
μ
s
V
k
V
Min.
0
0
0
0
12.25
0
Limits
Typ.
Unit
Test conditions
Parameter
Symbol
—
—
—
V
OT
V
FST
T
CONV
V
REF
R
LADDER
V
IA
V
CC
= 5.12V
I
OL
(SUM) = 0mA
V
CC
= 5.12V
25
MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
LOW period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
HIGH period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
t
BUF
t
HD:STA
t
LOW
t
R
t
HD:DAT
t
HIGH
t
F
t
SU:DAT
t
SU:STA
t
SU:STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1C
b
0
0.6
20+0.1C
b
100
0.6
0.6
Max.
300
0.9
300
μ
s
μ
s
μ
s
ns
μ
s
μ
s
ns
ns
μ
s
μ
s
Unit
Standard clock mode High-speed clock mode
Parameter
Symbol
Note:
C
b
= total capacitance of 1 bus line
Fig. 101. Definition Diagram of Timing on Multi-master I
2
C-BUS
Min.
4.7
4.0
4.7
0
4.0
250
4.7
4.0
SDA
SCL
P
t
BUF
S
t
HD
:
STA
t
LOW
t
R
t
HD
:
DAT
t
HIGH
t
F
t
SU
:
DAT
t
SU
:
STA
Sr
P
t
SU
:
STO
t
HD
:
STA
S
Sr
P
: Start condition
: Restart condition
: Stop condition
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