參數資料
型號: M34584EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數: 146/157頁
文件大小: 1130K
代理商: M34584EDFP
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Rev.3.00
2004.08.06
page 89 of 155
REJ03B0010-0300Z
4584 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
BM a (Branch and Mark to address a in page 2)
010a6
a5
a4
a3
a2
a1
a0
1aa
11
Grouping:
Subroutine call operation
Description: Call the subroutine in page 2 : Calls the
subroutine at address a in page 2.
Note:
Subroutine extending from page 2 to an-
other page can also be called with the BM
instruction when it starts on page 2.
Be careful not to over the stack because the
maximum level of subroutine nesting is 8.
Operation:
(SP)
← (SP) + 1
(SK(SP))
← (PC)
(PCH)
← 2
(PCL)
← a6–a0
BML p, a (Branch and Mark Long to address a in page p)
00110p4
p3
p2
p1
p0
0p
22
Grouping:
Subroutine call operation
Description: Call the subroutine : Calls the subroutine at
address a in page p.
Note:
p is 0 to 127 for M34584MD/ED.
Be careful not to over the stack because the
maximum level of subroutine nesting is 8.
Operation:
(SP)
← (SP) + 1
(SK(SP))
← (PC)
(PCH)
← p
(PCL)
← a6–a0
BMLA p (Branch and Mark Long to address (D) + (A) in page p)
0000110000
030
22
Grouping:
Subroutine call operation
Description: Call the subroutine : Calls the subroutine at
address (DR2 DR1 DR0 A3 A2 A1 A0)2 speci-
fied by registers D and A in page p.
Note:
p is 0 to 127 for M34584MD/ED.
Be careful not to over the stack because the
maximum level of subroutine nesting is 8.
CLD (CLear port D)
0000010001
011
11
Grouping:
Input/Output operation
Description: Sets (1) to port D.
Operation:
(D)
← 1
2
16
10p5
a6
a5
a4
a3
a2
a1
a0
2a
C
+p
Operation:
(SP)
← (SP) + 1
(SK(SP))
← (PC)
(PCH)
← p
(PCL)
← (DR2–DR0, A3–A0)
2
16
10p5
p4
00p3
p2
p1
p0
2pp
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
p
+a
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