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參數(shù)資料
| 型號： | M32180F8VFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP240 |
| 封裝： | 32 X 32 MM, 0.50 MM PITCH, PLASTIC, QFP-240 |
| 文件頁數(shù)： | 10/139頁 |
| 文件大小： | 3774K |
| 代理商： | M32180F8VFP |
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4
4-18
EIT
32180 Group User’s Manual (Rev.1.0)
4.9 Interrupt Processing
(6) Returning from the EIT handler
At the end of the EIT handler, restore the saved registers from the stack and execute the RTE instruction.
When the RTE instruction is executed, hardware postprocessing is automatically performed.
4.10 Trap Processing
4.10.1 Trap
[OccurrenceConditions]
Traps are software interrupts which are generated by executing the TRAP instruction. Sixteen traps are
generated, each corresponding to one of TRAP instruction operands 0–15. Accordingly, sixteen vector
entries are provided.
[EIT Processing]
(1) Saving SM, IE and C bits
The PSW register’s SM, IE and C bits are saved to the respective backup bits: BSM, BIE and BC.
BSM
←
SM
BIE
←
IE
BC
←
C
(2) Updating SM, IE and C bits
The PSW register’s SM, IE and C bits are updated as shown below.
SM
←
Unchanged
IE
←
0
C
←
0
(3) Saving the PC
When the trap instruction is executed, the PC value of TRAP instruction + 4 is set in the BPC register. For
example, if the TRAP instruction is located at address 4, the value H’08 is set in the BPC register.
Similarly, if the TRAP instruction is located at address 6, the value H’0A is set in the BPC register. The
value of the BPC register bit 30 indicates whether the trap instruction resides on a word boundary (BPC
register bit 30 = "0") or not on a word boundary (BPC register bit 30 = "1").
However, in either case of the above, the address to which the RTE instruction returns after the EIT
handler has terminated is address 8. (This is because the 2 low-order address bits are cleared to ‘00’
when returned to the PC.)
Figure 4.10.1 Example of a Return Address for Trap (TRAP)
H'00
Address
H'04
H'08
H'0C
+0
+1
+2
+3
H'00
Address
H'04
H'08
H'0C
+0
+1
+2
+3
BPC
H'0A
BPC
H'08
TRAP instruction
Return
address
Return
address
TRAP instruction
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相關(guān)代理商/技術(shù)參數(shù) |
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| M32180T2-PTC | 功能描述:DEV CONNECTION CNVTR FOR 32180 G RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁面:1429 (CN2011-ZH PDF) |
| M32182F3TFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES |
| M32182F3UFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES |
| M32182F3VFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES |
| M32182F8TFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES |
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