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13. Serial I/O
page 139
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Figure 13.1.7. U0C1 to U2C1 registers, PACR register
Pin Assignment Control Register (1)
Symbpl
Address
After Reset
PACR
025D16
0016
Bit Name
Function
Bit Symbol
RW
b7
b6
b5
b4
b3
b2
b1
b0
Pin enabling bit
Nothing is assigned.
When write,
set to “0”. When read, its
content is “0”.
RW
(b6-b3)
001 : 42 pin
100 : 48 pin
All other values are reserved. Do
not use.
PACR0
PACR1
PACR2
RW
Reserved bits
U1MAP
UART1 pin remapping bit
UART1 pins assigned to
0 : P67 to P64
1 : P73 to P70
RW
NOTES:
1. Set the PACR register by the next instruction after setting the PRC2 bit in the PRCR register to "1"(write
enable).
UARTi Transmit/receive Control Register 1 (i=0, 1)
Symbol
Address
After Reset
U0C1, U1C1
03A516,03AD16
000000102
b7
b6
b5
b4
b3
b2
b1
b0
Bit Name
Bit
Symbol
RW
Function
TE
TI
RE
RI
Transmit enable bit
Receive enable bit
Receive complete flag
Transmit buffer
empty flag
0 : Transmission disabled
1 : Transmission enabled
0 : Data in UiTB register
1 : No data in UiTB register
0 : Reception disabled
1 : Reception enabled
0 : No data in UiRB register
1 : Data in UiRB register
Nothing is assigned.
When write, set “0”. When read, the contents are “0”.
UART2 Transmit/receive Control Register 1
Symbol
Address
After Reset
U2C1
037D16
000000102
b7
b6
b5
b4
b3
b2
b1
b0
Bit Name
Bit
Symbol
Function
TE
TI
RE
RI
Transmit enable bit
Receive enable bit
Receive complete flag
Transmit buffer
empty flag
0 : Transmission disabled
1 : Transmission enabled
0 : Reception disabled
1 : Reception enabled
U2IRS
UART2 transmit interrupt
cause select bit
0 : Transmit buffer empty (TI = 1)
1 : Transmit is completed (TXEPT = 1)
U2RRM UART2 continuous
receive mode enable bit
0 : Continuous receive mode disabled
1 : Continuous receive mode enabled
Data logic select bit
0 : No reverse
1 : Reverse
U2LCH
U2ERE Error signal output
enable bit
0 : Output disabled
1 : Output enabled
RW
RO
RW
RO
(b7-b4)
0 : Data in U2TB register
1 : No data in U2TB register
0 : No data in U2RB register
1 : Data in U2RB register