參數(shù)資料
型號(hào)： M2V64S3DTP-6
廠商： Mitsubishi Electric Corporation
英文描述： 64M Synchronous DRAM
中文描述： 6400同步DRAM
文件頁(yè)數(shù)： 28/51頁(yè)
文件大?。?/td> 430K
代理商： M2V64S3DTP-6
Feb.'00
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.3.2)
64M Synchronous DRAM
M2V64S20DTP-6,-6L,-7,-7L,-8,-8L
M2V64S30DTP-6,-6L,-7,-7L,-8,-8L
M2V64S40DTP-6,-6L,-7,-7L,-8,-8L
(4-BANK x 4,194,304-WORD x 4-BIT)
(4-BANK x 2,097,152-WORD x 8-BIT)
(4-BANK x 1,048,576-WORD x 16-BIT)
28
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H, CKE= L).
Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During the self-refresh mode,
CKE is asynchronous and the only enabled input. All other inputs including CLK are disabled and
ignored, so that power consumption due to synchronous inputs is saved. To exit the self-refresh,
supplying stable CLK inputs, asserting DESEL or NOP command and then asserting CKE=H. After
tRFC from the 1st CLK edge following CKE=H, all banks are in idle state and a new command can be
issued, but DESEL or NOP commands must be asserted till then.
Self-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-11
BA0-1
Self Refresh Entry
Self Refresh Exit
X
00
new command
minimum tRFC
for recovery
Stable CLK
NOP
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