參數(shù)資料
型號(hào): LTC3850EUF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 860 kHz SWITCHING FREQ-MAX, PQCC28
封裝: 4 X 4 MM, PLASTIC, QFN-28
文件頁(yè)數(shù): 31/32頁(yè)
文件大小: 474K
代理商: LTC3850EUF
LTC3850
8
3850f
PIN FUNCTIONS
RUN1, RUN2 (Pins 1, 13/Pins 26, 9): Run Control Inputs.
A voltage above 1.2V on either pin turns on the IC. How-
ever, forcing either of these pins below 1.2V causes the
IC to shut down that particular channel. There are 0.5A
pull-up currents for these pins. Once the RUN pin rises
above 1.2V, an additional 4.5A pull-up current is added
to the pin.
SENSE1+, SENSE2+ (Pins 2, 12/Pins 27, 8): Current
Sense Comparator Inputs. The (+) inputs to the current
comparators are normally connected to DCR sensing
networks or current sensing resistors.
SENSE1, SENSE2(Pins 3, 11/Pins 28, 7): Current
Sense Comparator Inputs. The (–) inputs to the current
comparators are connected to the outputs.
TK/SS1, TK/SS2 (Pins 4, 10/Pins 1, 6): Output Voltage
Tracking and Soft-Start Inputs. When one channel is
congured to be master of the two channels, a capacitor
to ground at this pin sets the ramp rate for the master
channel’s output voltage. When the channel is congured
to be the slave of two channels, the VFB voltage of the
master channel is reproduced by a resistor divider and
applied to this pin. Internal soft-start currents of 1.3A
charge the soft-start capacitors.
ITH1, ITH2 (Pins 5, 9/Pins 2, 5): Current Control Thresholds
and Error Amplier Compensation Points. Each associated
channels’ current comparator tripping threshold increases
with its ITH control voltage.
VFB1, VFB2 (Pins 6, 8/Pins 3, 4): Error Amplier Feedback
Inputs. These pins receive the remotely sensed feedback
voltages for each channel from external resistive dividers
across the outputs.
SGND (Pin 7/Pin 29): Signal Ground. All small-signal
components and compensation components should con-
nect to this ground, which in turn connects to PGND at
one point. Pin 29 is the Exposed Pad, only available on
the UF package.
EXTVCC (NA/Pin 11): External Power Input to an Internal
Switch Connected to INTVCC. This switch closes and
supplies the IC power, bypassing the internal low dropout
regulator, whenever EXTVCC is higher than 4.7V. Do not
exceed 6V on this pin.
ILIM (Pin 14/Pin 10): Current Comparator Sense Voltage
Range Inputs. Tying this pin to SGND, FLOAT or INTVCC
sets the maximum current sense threshold to three dif-
ferent levels for each comparator.
PGOOD (Pin 15/Pin 12): Power Good Indicator Output.
Open-drain logic out that is pulled to ground when either
channel output exceeds the ±7.5% regulation window,
after the internal 17s power bad mask timer expires.
PGND (Pin 19/Pin 16): Power Ground Pin. Connect this pin
closely to the sources of the bottom N-channel MOSFETs,
the (–) terminal of CVCC and the (–) terminal of CIN.
INTVCC (Pin 21/Pin 18): Internal 5V Regulator Output.
The control circuits are powered from this voltage.
Decouple this pin to PGND with a 4.7F low ESR tantalum
or ceramic capacitor.
VIN (Pin 22/Pin 19): Main Input Supply. Decouple this pin
to PGND with a capacitor (0.1F to 1F).
BG1, BG2 (Pins 23, 20/Pins 20, 17): Bottom Gate Driver
Outputs. These pins drive the gates of the bottom N-Channel
MOSFETs and swings between PGND and INTVCC.
BOOST1, BOOST2 (Pins 24, 18/Pins 21, 15): Boosted
Floating Driver Supplies. The (+) terminal of the boost-strap
capacitors connect to these pins. These pins swing from a
diode voltage drop below INTVCC up to VIN + INTVCC.
TG1, TG2 (Pins 25, 17/Pins 22, 14): Top Gate Driver
Outputs. These are the outputs of oating drivers with
a voltage swing equal to INTVCC superimposed on the
switch nodes voltages.
SW1, SW2 (Pins 26, 16/Pins 23, 13): Switch Node Con-
nections to Inductors. Voltage swing at these pins are from
a body diode voltage drop below ground to VIN.
MODE/PLLIN (Pin 27/Pin 24): Force Continuous Mode,
Burst Mode, or Pulse-Skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
Connect this pin to SGND to force both channels into
the continuous mode of operation. Connect to INTVCC
to enable pulse-skipping mode of operation. Leaving the
pin oating will enable Burst Mode operation. A clock on
the pin will force the controller into continuous mode of
operation and synchronize the internal oscillator.
(GN/UF)
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