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參數資料
| 型號： | LTC2450IDC-1#TRMPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 6-DFN |
| 產品培訓模塊： | LTC2460 and LTC2450 Delta Sigma ADC Families |
| 標準包裝： | 1 |
| 位數： | 16 |
| 采樣率（每秒）： | 30 |
| 數據接口： | 串行，SPI? |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 1.05mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-WFDFN 裸露焊盤 |
| 供應商設備封裝： | 6-DFN-EP（2x2） |
| 包裝： | 標準包裝 |
| 輸入數目和類型： | 1 個單端，單極 |
| 產品目錄頁面： | 1348 (CN2011-ZH PDF) |
| 其它名稱： | LTC2450IDC-1#TRMPBFDKR |
LTC2450-1
16
24501fc
APPLICATIONS INFORMATION
Figure 16. Measured INL vs Input Voltage,
CIN = 0.1μF, VCC = 5V, TA = 25°C
For most applications, it is desirable to implement CIN as
a high quality 0.1μF ceramic capacitor and RS ≤ 1k. This
capacitor should be located as close as possible to the
actual VINpackagepin.Furthermoretheareaencompassed
by this circuit path as well as the path length should be
minimized.
In the case of a 2-wire sensor which is not remotely
grounded, it is desirable to split RS and place series
resistors in the ADC input line as well as in the sensor
ground return line which should be tied to the ADC GND
pin using a star connection topology.
Figure 16 shows the measured LTC2450-1 INL vs
Input Voltage as a function of RS value with an input
capacitor CIN = 0.1μF.
In some cases, RS can be increased above these guide-
lines. The input current is zero while the ADC is either in
sleep or I/O modes. Thus, if the time constant of the input
R-C circuit
τ = RS CIN is of the same order magnitude or
longer than the time periods between actual conversions,
then one can consider the input current to be reduced
correspondingly.
These considerations need to be balanced out by the input
signal bandwidth. The 3dB bandwidth
1/(2π RS CIN).
Finally, if the recommended choice for CIN is unacceptable
for the user’s specic application, an alternate strategy is to
eliminate CIN and minimize CPAR and RS. In practical terms,
this conguration corresponds to a low impedance sensor
directly connected to the ADC through minimum length
traces. Actual applications include current measurements
through low value sense resistors, temperature measure-
ments, low impedance voltage source monitoring and so
on. The resultant INL vs VIN is shown in Figure 17. The
measurements of Figure 17 include a CPAR capacitor cor-
responding to a minimum size layout pad and a minimum
width input trace of about 1 inch length.
Figure 17. Measured INL vs VIN, CIN = 0, VCC = 5V, TA = 25°C
INPUT VOLTAGE (V)
0
INL(LSB)
–4
0
4
3
5
24501 F16
–8
–12
–16
12
4
8
12
16
RS = 10k
RS = 1k
RS = 0
INPUT VOLTAGE (V)
0
INL
(LSB)
8
6
4
2
0
–2
–4
–6
–8
4
24501 F17
123
5
3.5
0.5
1.5
2.5
4.5
RS = 1k
RS = 10k
RS = 0
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