參數(shù)資料
型號(hào): LTC1196
廠商: Linear Technology Corporation
英文描述: 8-Bit, SO-8,1MSPS ADCs(SO-8封裝,8位,1MSPS,模數(shù)轉(zhuǎn)換器(差分輸入))
中文描述: 8位,SO - 8封裝,1MSPS模數(shù)轉(zhuǎn)換器(以SO - 8封裝,8位,1MSPS,模數(shù)轉(zhuǎn)換器(差分輸入))
文件頁數(shù): 4/28頁
文件大小: 373K
代理商: LTC1196
4
LTC1196/LTC1198
V
CC
= 5V, V
REF
= 5V, f
CLK
= f
CLK(MAX)
as defined in Recommended Operating Conditions, unless otherwise noted.
DUW
RECW
U
V
CC
= 2.7V Operation
U
U
U
AC CHARACTERISTICS
V
CC
= 5V, V
REF
= 5V, f
CLK
= f
CLK(MAX)
as defined in Recommended Operating Conditions, unless otherwise noted.
LTC1196
TYP
47/45
49/47
55/48
51
LTC1198
TYP
47/45
49/47
55/48
51
SYMBOL
S/(N + D)
THD
PARAMETER
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Peak Harmonic or Spurious Noise
Intermodulation Distortion
CONDITIONS
500kHz/1MHz Input Signal
500kHz/1MHz Input Signal
500kHz/1MHz Input Signal
f
IN1
= 499.37kHz,
f
IN2
= 502.446kHz
MIN
MAX
MIN
MAX
UNITS
dB
dB
dB
dB
IMD
Full Power Bandwidth
Full Linear Bandwidth [S/(N + D) > 44dB]
8
1
8
1
MHz
MHz
LTC1196-1
LTC1198-1
TYP
LTC1196-2
LTC1198-2
TYP
SYMBOL
f
CLK
PARAMETER
Clock Frequency
CONDITIONS
MIN
0.01
0.01
12
16
2.5
20
40
MAX
5.4
4.6
MIN
0.01
0.01
12
16
2.5
40
78
MAX
4
3
UNITS
MHz
MHz
CLK
CLK
CLK
G
t
CYC
Total Cycle Time
LTC1196
LTC1198
t
SMPL
t
hCS
t
suCS
Analog Input Sampling Time
Hold Time CS Low After Last CLK
Setup Time CS
Before First CLK
(See Figures 1, 2)
ns
ns
LTC1196-1
LTC1198-1
TYP
LTC1196-2
LTC1198-2
TYP
SYMBOL
t
CONV
PARAMETER
Conversion Time (See Figures 1, 2)
CONDITIONS
MIN
MAX
600
710
MIN
MAX
710
900
UNITS
ns
ns
G
f
SMPL(MAX)
Maximum Sampling Frequency
LTC1196
LTC1196
LTC1198
LTC1198
C
LOAD
= 20pF
1.20
1.00
0.90
0.75
1.00
0.80
0.75
0.60
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
G
G
t
dDO
Delay Time, CLK
to D
OUT
Data Valid
55
64
73
120
50
68
78
94
150
63
G
t
DIS
t
en
t
hDO
Delay Time CS
to D
OUT
Hi-Z
Delay Time, CLK
to D
OUT
Enabled
Time Output Data Remains Valid
After CLK
D
OUT
Fall Time
D
OUT
Rise Time
Input Capacitance
G
70
30
45
88
43
55
C
LOAD
= 20pF
C
LOAD
= 20pF
G
G
30
30
t
r
t
f
C
IN
C
LOAD
= 20pF
C
LOAD
= 20pF
Analog Input On Channel
Analog Input Off Channel
Digital Input
G
5
5
15
15
10
10
30
5
5
20
20
ns
ns
pF
pF
pF
G
30
5
5
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