參數(shù)資料
型號： LM4560
廠商： National Semiconductor Corporation
英文描述： Advanced PCI Audio Accelerator
中文描述： 先進的PCI音頻加速器
文件頁數(shù)： 34/54頁
文件大?。?/td> 380K
代理商： LM4560
4.0 Functional Description
(Continued)
4.1.3 Envelope engine
Low frequency AM, Envelope calculation and PAN are processed by Envelope Engine.
Terms:
Ec (12 bits)— Current envelope value in format of 6.6
AMS_H (2 bits)— Higher 2 bits of AMS
AMS_L (2 bits)— Lower 2 bits of AMS
AMS (4 bits)— Amplitude Modulation Step in format of 0.004 (right aligned with Ec)
SIN (4 bits)— current state of sin counter
AMA (8 bits)— Amplitude Modulation Amount in format of 2.6
VOL (8 bits)— Volume Attenuation per channel in format of 5.3
GVSEL (1 bit)— Global volume select bit
MUSICVOL_L (8 bits)— global music volume attenuation Left (6.2)
MUSICVOL_R (8 bits)— global music volume attenuation Right (6.2)
WAVEVOL_L (8 bits)— global wave volume attenuation Left (6.2)
WAVEVOL_R (8 bits)— global wave volume attenuation Right (6.2)
Eva (12 bits)— Current envelope after Volume attenuation
ATTNU_L (8 bits)— Left attenuation.
ATTNU_R (8 bits)— Right attenuation.
PAN (7 bits)— Positioning Attenuation (4.2 with one select bit)
EL (12 bits)— Left channel envelope value after PAN(6.6)
ER (12 bits)— Right channel envelope value after PAN(6.6)
VL (12 bits)— Left channel volume after anti-log operation
VR (12 bits)— Right channel volume after anti-log operation
EMOD (3 bits)— Envelope operation mode
ECNT (8 bits)— Envelope ramp counter
EINIT (8 bits)— Initial value of ECNT
EAMT (12 bits)— Envelope ramp amount
EDLY (20 bits)— Envelope delay counter
CEBF (1 bit)— Current Envelope Buffer Flag
4.1.4 Interpolation & Volume Adjusting
This multiply-add block process interpolation & volume adjusting.
Terms:
D1 (16 bits)— Current sample data (in MONO mode)
D1_L (16 bits)— Current sample data Left (in Stereo mode)
D1_R (16 bits)— Current sample data Right (in Stereo mode)
D2 (16 bits)— Sample data next to D1 (in MONO mode)
D2_L (16 bits)— Sample data next to D1_L (in Stereo mode)
D2_R (16 bits)— Sample data next to D1_R (in Stereo mode)
D (16 bits)— Data after interpolation (in MONO mode)
D_L (16 bits)— Data after interpolation Left (in Stereo mode)
D_R (16 bits)— Data after interpolation Right (in Stereo mode)
VL (12 bits)— Dry volume (Left)
VR (12 bits)— Dry volume (Right)
CVOL(7 bits)— Chorus Send Volume
RVOL(7 bits)— Reverb Send Volume
VDl (signed 20 bits)— volume adjusted Dry data (left)
VDr (signed 20 bits)— volume adjusted Dry data (right)
CSDl (signed 17 bits)— Chorus Send data (left)
CSDr (signed 17 bits)— Chorus Send data (right)
RSDl (signed 17 bits)— Reverb Send data (left)
RSDr (signed 17 bits) — Reverb Send data ( right )
1) Data conversion:
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