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參數(shù)資料
| 型號(hào)： | LM2633 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Advanced Two-Phase Synchronous Triple Regulator Controller for Notebook CPUs |
| 中文描述： | 先進(jìn)的兩相同步三穩(wěn)壓控制器用于筆記本處理器 |
| 文件頁(yè)數(shù)： | 6/40頁(yè) |
| 文件大?。?/td> | 1350K |
| 代理商： | LM2633 |
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TABLE 1. Shut Down Latch Truth Table
Input
Output
latch off
ovp1
ovp2
uvp1
uvp2
uvplr
new
vid
0
ch1 on
ch2 on
fault
ssto1
ssto2
uv_delay
1
Σ
=1
Σ
=1
0
0
0
0
0
1
1
1
1
1
0
1
1
0
1
1
cap
cap
cap
1
1
1
1
Σ
= 1
Σ
= 1
All other combinations
Note 1:
’
Σ
=1’ means at least one variable is high.
Note 2:
’Fault’ is the logic OR of UVLO and thermal shutdown.
Note 3:
’Cap’ means the pin has a capacitor of appropriate value between it and ground.
Note 4:
Positive logic is used.
Note 5:
For meanings of the variables, refer to the block diagrams.
Note 6:
A blank value means ’don’t care’.
TABLE 2. Power Good Truth Table
Input
Output
PGOOD
ovp1
ovp2
uvpg1
uvpg2
uvpglr
new
vid
ch1 on
ch2 on
fault
latch off
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
π
= 0
1
1
All other combinations
Note 7:
″π
= 0
″
means at least one variable is low.
Note 8:
Positive logic is used.
Note 9:
A blank value means ’don’t care’.
Note 10:
For meanings of the variables, refer to the block diagrams.
TABLE 3. VID Code and DAC Output
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
DAC Voltage (V)
No CPU
*
0.925
0.950
0.975
1.000
1.025
1.050
1.075
1.100
1.125
1.150
1.175
1.200
1.225
L
www.national.com
6
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