參數(shù)資料
型號(hào): LH7A400N0F076B5
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: 32-Bit System-on-Chip
封裝: LH7A400N0F000B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT1020-1.html<1<Always Pb-free,;LH7A400N0F076B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT
文件頁(yè)數(shù): 6/65頁(yè)
文件大?。?/td> 834K
代理商: LH7A400N0F076B5
LH7A400
32-Bit System-on-Chip
6
Rev. 01
16 July 2007
Preliminary data sheet
NXP Semiconductors
R11
N12
P12
T11
D3
P12
M10
R13
N11
E4
VDDA
Analog Power for PLL
VSSA
Analog Ground for PLL
nPOR
Power On Reset
User Reset; should be pulled HIGH for normal or
JTAG operation.
Wake Up
Power Fail Signal
External Power
Input
No Change
I
3
H6
D1
nURESET
Input
No Change
I
3
D4
E4
C2
E2
F2
D2
WAKEUP
nPWRFL
nEXTPWR
Input
Input
Input
No Change
No Change
No Change
I
I
I
3
3
3
R13
R14
XTALIN
14.7456 MHz Crystal Oscillator pins. An external
clock source can be connected to XTALIN leaving
XTALOUT open.
Input
No Change
I
T13
R15
XTALOUT
HIGH
HIGH
O
P16
N14
XTAL32IN
32.768 kHz Real Time Clock Crystal Oscillator
pins. An external clock source can be connected to
XTAL32IN leaving XTAL32OUT open.
Input
No Change
I
P15
M13
XTAL32OUT
Output
No Change
O
P14
J6
K11
K10
P13
M12
J5
P14
P16
N15
CLKEN
PGMCLK
nCS0
nCS1
nCS2
nCS3/
nMMSPICS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
External Osc Clock Enable Output
Programmable Clock (14.7456 MHz MAX.)
Async Memory Chip Select 0
Async Memory Chip Select 1
Async Memory Chip Select 2
Async Memory Chip Select 3
MultiMediaCard SPI Mode Chip Select
LOW
LOW
HIGH
HIGH
HIGH
HIGH:
nCS3
LOW
8 mA
8 mA
12 mA
12 mA
12 mA
O
O
O
O
O
LOW or HIGH
No Change
No Change
No Change
M12
N16
No Change
12 mA
O
L12
M15
N13
L16
L15
L14
H11
K12
J15
J13
J10
H15
H13
G15
G11
G12
F15
F12
E14
D16
H10
D14
F10
A16
A14
B13
L11
L13
L14
K11
L16
K14
J15
J12
J10
H16
H14
H11
G16
G9
G14
G12
F15
E15
D16
F12
E13
D14
E12
B16
D12
A16
Data Bus
LOW
LOW
12 mA
I/O
Table 3. Functional Pin List (Cont’d)
BGA
PIN
LFBGA
PIN
SIGNAL
DESCRIPTION
RESET
STATE
STANDBY
STATE
OUTPUT
DRIVE
I/O NOTES
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