參數(shù)資料
型號: KAC-1310
廠商: Electronic Theatre Controls, Inc.
英文描述: 1280 (H) x 1024 (V) SXGA CMOS Image Sensor
中文描述: 1280(高)x 1024(五)SXGA CMOS圖像傳感器
文件頁數(shù): 61/76頁
文件大小: 759K
代理商: KAC-1310
IMAGE SENSOR SOLUTIONS
61
IMAGE SENSOR SOLUTIONS
K A C - 1 3 1 0 R e v 4 w w w . k o d a k . c o m / g o / i m a g e r s 5 8 5 - 7 2 2 - 4 3 8 5 E m a i l : i m a g e r s @ k o d a k . c o m
Integration Time Control (4E
h
The integration Time registers control the
integration time for the pixel array. Integration
time is measured in Virtual Row times. Refer to
Figure 8
on
page
13
for a pictorial description of
the Virtual Frame and its relationship to the WOI
Frame. A Virtual Frame is the mechanism by
NOTE:
The
upd bit
of Reg 4E
h
is used to indicate a change to
cin
t[13:0]. Since multiple I
2
C writes may be needed to
complete desired frame to frame integration time changes, the
upd
bit signals that all desired programming has been
completed, and to apply these changes to the next frame captured. This prevents undesirable changes in integration
time that may result from I
C writes that span the “End of Frame” boundary. This
upd
bit has to be toggled from its
previous state in order for the new value of
cin
t[13:0] to be accepted/updated by the sensor and take effect.
i.e. If its previous state is “0”, when writing a new
cint
value, first write cint[7:0] to register 4F
h
, then write both
cint
[13:8] and “1” to the
upd
bit to register 4E
h
.
Integration Time = (cint
d
+ 1) * (vcw
d
+ shA
d
+shB
d
+19) * MCLK
period
where vcw
d
is defined in registers 52
h
and 53
h
,
Table 35
and
Table 36
on
page
60
.
(NOTE ABOVE LEFT IN SINGLE COLUMN FORMAT FOR CONSISTENCY WITH OTHER “NOTES”)
Address
4E
h
4F
h
)
which the user controls the integration time and
frame time for the output data stream. By adding
additional rows or columns as ‘blanking’ to the
WOI to form the Virtual Frame, the user can
control the amount of blanking in both horizontal
and vertical space.
Integration Time MSB
Default
04
h
7 (msb)
6
5
4
3
2
1
0 (lsb)
x
upd
cint[13]
cint[12]
cint[11]
cint[10]
cint[97]
cint[8]
Bit
Number
Function Description
Reset
State
7
Unused Unused
x
b
6
Update
This bit must be toggled from its previous state to apply cint
to the integration time counter.
0
b
5 - 0
Integration
Time
In conjuction with the Integration Time LSB Register, forms
the 14-bit Integration Time cint[13:0].
000100
b
Table 38: Integration Time MSB Register (4E
h
)
Address
4F
h
Integration Time LSB
Default
FF
h
7 (msb)
6
5
4
3
2
1
0 (lsb)
cint[7]
cint[6]
cint[5]
cint[4]
cint[3]
cint[2]
cint[1]
cint[0]
Bit
Number
Function Description
Reset
State
7 - 0
Integration
Time
In conjuction with the Integration Time MSB Register, forms
the 14-bit Integration Time cint[13:0].
Integration Time = (cintd +1) * Trow
11111111
b
1280 Rows
Table 39: Integration Time LSB Register (4F
h
)
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