參數(shù)資料
型號(hào): K4E640411D-TC500
元件分類: DRAM
英文描述: 16M X 4 EDO DRAM, 50 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, TSOP2-32
文件頁數(shù): 18/21頁
文件大?。?/td> 407K
代理商: K4E640411D-TC500
CMOS DRAM
K4E660411D, K4E640411D
AC CHARACTERISTICS (Continued)
Parameter
Symbol
-50
-60
Units
Note
Min
Max
Min
Max
Data hold time
tDH
8
10
ns
9
Refresh period (4K, Normal)
tREF
64
ms
Refresh period (8K, Normal)
tREF
64
ms
Write command set-up time
tWCS
0
ns
7
CAS to W delay time
tCWD
30
32
ns
7
RAS to W delay time
tRWD
67
77
ns
7
Column address to W delay time
tAWD
42
47
ns
7
CAS set-up time (CAS -before-RAS refresh)
tCSR
5
ns
CAS hold time (CAS -before-RAS refresh)
tCHR
10
ns
RAS to CAS precharge time
tRPC
5
ns
Access time from CAS precharge
tCPA
28
35
ns
3
Hyper Page cycle time
tHPC
20
25
ns
13
Hyper Page read-modify-write cycle time
tHPRWC
47
56
ns
13
CAS precharge time (Hyper page cycle)
tCP
8
10
ns
RAS pulse width (Hyper page cycle)
tRASP
50
200K
60
200K
ns
RAS hold time from CAS precharge
tRHCP
30
35
ns
OE access time
tOEA
13
15
ns
OE to data delay
tOED
13
ns
CAS precharge to W delay time
tCPWD
45
54
ns
Output buffer turn off delay time from OE
tOEZ
3
13
3
13
ns
6
OE command hold time
tOEH
13
15
ns
Write command set-up time (Test mode in)
tWTS
10
ns
11
Write command hold time (Test mode in)
tWTH
10
ns
11
W to RAS precharge time (C-B-R refresh)
tWRP
10
ns
W to RAS hold time (C-B-R refresh)
tWRH
10
ns
Output data hold time
tDOH
5
ns
Output buffer turn off delay from RAS
tREZ
3
13
3
13
ns
6,14
Output buffer turn off delay from W
tWEZ
3
13
3
13
ns
6
W to data delay
tWED
15
ns
OE to CAS hold time
tOCH
5
ns
CAS hold time to OE
tCHO
5
ns
OE precharge time
tOEP
5
ns
W pulse width (Hyper page Cycle)
tWPE
5
ns
RAS pulse width (C-B-R self refresh)
tRASS
100
us
15,16,17
RAS precharge time (C-B-R self refresh)
tRPS
90
110
ns
15,16,17
CAS hold time (C-B-R self refresh)
tCHS
-50
ns
15,16,17
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