參數(shù)資料
型號(hào)： ISP1183
廠商： NXP Semiconductors N.V.
英文描述： Low-power Universal Serial Bus interface device with DMA
中文描述： 低功耗通用串行總線與DMA接口設(shè)備
文件頁(yè)數(shù)： 35/62頁(yè)
文件大?。?/td> 295K
代理商： ISP1183
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
35 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Remark:
For special aspects of the control IN endpoint, see
Section 10.5
.
Code (hex): 61 to 6F —
validate endpoint buffer (control IN, endpoints 1 to 14)
Transaction —
none
13.2.5
Clear Endpoint Buffer (70H, 72H–7FH)
This command unlocks and clears the buffer of the selected OUT endpoint, allowing
the reception of new packets. Reception of a complete packet causes the Buffer Full
flag of an OUT endpoint to be set. Any subsequent packets are refused by returning a
NAK condition, until the buffer is unlocked using this command. For a double-buffered
endpoint, this command switches the current FIFO for CPU access.
Remark:
For special aspects of the control OUT endpoint, see
Section 10.5
.
Code (hex): 70, 72 to 7F —
clear endpoint buffer (control OUT, endpoints 1 to 14)
Transaction —
none
13.2.6
Check Endpoint Status (D0H–DFH)
This command checks the status of the selected endpoint FIFO without clearing any
status or interrupt bits. The command accesses the Endpoint Status Image register,
which contains a copy of the Endpoint Status register. The bit allocation of the
Endpoint Status Image register is shown in
Table 28
.
Code (hex): D0 to DF —
check status (control OUT, control IN, endpoints 1 to 14)
Transaction —
write or read 1 byte
Table 28:
Bit
Symbol
Endpoint Status Image register: bit allocation
7
6
EPSTAL
EPFULL1
5
4
3
2
1
0
EPFULL0
DATA_PID
OVER
WRITE
0
R
SETUPT
CPUBUF
reserved
Reset
Access
0
R
0
R
0
R
0
R
0
R
0
R
0
R
Table 29:
Bit
7
Endpoint Status Image register: bit description
Symbol
Description
EPSTAL
This bit indicates whether the endpoint is stalled or not
(1 = stalled, 0 = not stalled).
EPFULL1
Logic 1 indicates that the secondary endpoint buffer is full.
EPFULL0
Logic 1 indicates that the primary endpoint buffer is full.
DATA_PID
This bit indicates the data PID of the next packet
(0 = DATA0 PID, 1 = DATA1 PID).
6
5
4
相關(guān)PDF資料
PDF描述
ISP1183BS Low-power Universal Serial Bus interface device with DMA
ISP1301 Universal Serial Bus On-The-Go transceiver
ISP1301BS Universal Serial Bus On-The-Go transceiver
ISP1362 Single-chip Universal Serial Bus On-The-Go controller
ISP1362BD Single-chip Universal Serial Bus On-The-Go controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1183BS 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
ISP1183BS,118 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,151 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BSFA 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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