參數(shù)資料
型號(hào): ISP1181A
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus peripheral controller
中文描述: 全速通用串行總線外設(shè)控制器
文件頁(yè)數(shù): 38/70頁(yè)
文件大?。?/td> 341K
代理商: ISP1181A
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
38 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
12.3.3
Write/Read Scratch Register
This command accesses the 16-bit Scratch Register, which can be used by the
firmware to save and restore information, for example, the device status before
powering down in ‘suspend’ state. The register bit allocation is given in
Table 40
.
Code (Hex): B2/B3 —
write/read Scratch Register
Transaction —
write/read 2 bytes
12.3.4
Read Frame Number
This command returns the frame number of the last successfully received SOF. It is
followed by reading one or two bytes from the Frame Number Register, containing the
frame number (lower byte first). The Frame Number Register is shown in
Table 42
.
Remark:
After a bus reset, the value of the Frame Number Register is undefined.
Bit
Symbol
Reset
Access
7
6
5
4
3
2
1
0
UNLOCKL[7:0] = 37H
1
W
0
W
0
W
1
W
0
W
1
W
1
W
1
W
Table 39:
Bit
15 to 0
Lock Register: bit description
Symbol
UNLOCK[15:0]
Description
Sending data AA37H unlocks the internal registers and FIFOs
for writing, following a ‘resume’.
Table 40:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Scratch Information Register: bit allocation
15
14
reserved
0
0
R/W
R/W
7
6
13
12
11
10
9
8
SFIRH[6:0]
0
R/W
3
0
0
0
0
0
R/W
5
R/W
4
R/W
2
R/W
1
R/W
0
SFIRL[7:0]
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 41:
Bit
15
14 to 8
7 to 0
Scratch Information Register: bit description
Symbol
Description
-
reserved; must be logic 0
SFIRH[6:0]
Scratch Information Register (high byte)
SFIRL[7:0]
Scratch Information Register (low byte)
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