參數(shù)資料
型號(hào)： ISP1181
廠商： NXP Semiconductors N.V.
英文描述： Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件)
中文描述： 全速通用串行總線接口設(shè)備（全速通用串行總線接口器件）
文件頁(yè)數(shù)： 16/69頁(yè)
文件大?。?/td> 1655K
代理商： ISP1181
Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
16 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
In DACK-only mode the ISP1181 uses the DACK signal as data strobe. Input signals
RD and WR are ignored. This mode is used in CPU systems that have a single
address space for memory and I/O access. Such systems have no separate MEMW
and MEMR signals: the RD and WR signals are also used as memory data strobes.
10.4 End-Of-Transfer conditions
10.4.1
Bulk endpoints
A DMA transfer to/from a bulk endpoint can be terminated by any of the following
conditions (bit names refer to the DMA Configuration Register, see
Table 26
):
An external End-Of-Transfer signal occurs on input EOT
The internal DMA Counter Register reaches zero (CNTREN = 1)
A short/empty packet is received on an enabled OUT endpoint (SHORTP = 1)
DMA operation is disabled by clearing bit DMAEN.
External EOT:
When reading from an OUT endpoint, an external EOT will stop the
DMA operation and
clear any remaining data
in the current FIFO. For a double-
buffered endpoint the other (inactive) buffer is not affected.
When writing to an IN endpoint, an EOT will stop the DMA operation and the data
packet in the FIFO (even if it is smaller than the maximum packet size) will be sent to
the USB host at the next IN token.
DMA Counter Register zero:
An EOT from the DMA Counter Register is enabled by
setting bit CNTREN in the DMA Configuration Register. The ISP1181 has a 16-bit
DMA Counter Register, which specifies the number of bytes to be transferred. When
DMA is enabled (DMAEN = 1), the internal DMA counter is loaded with the value from
the DMA Counter Register. When the internal counter reaches zero an EOT condition
is generated and the DMA operation stops.
Short/empty packet:
Normally, the transfer byte count must be set via a control
endpoint before any DMA transfer takes place. When a short/empty packet has been
enabled as EOT indicator (SHORTP = 1), the transfer size is determined by the
presence of a short/empty packet in the data. This mechanism permits the use of a
fully autonomous data transfer protocol.
Fig 4.
ISP1181 in DACK-only DMA mode.
idth
RAM
ISP1181
DMA
CONTROLLER
CPU
DREQ
DACK
HRQ
HLDA
HRQ
HLDA
DREQ
DACK
RD
WR
MGS779
AD,
DATA1 to DATA15
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1181A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS,518 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,551 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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