參數(shù)資料
型號(hào): ISP1161ABD
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù): 49/134頁(yè)
文件大?。?/td> 587K
代理商: ISP1161ABD
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Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
49 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.1.5
HcInterruptEnable register (R/W: 04H/84H)
Each enable bit in the HcInterruptEnable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used
to control which events generate a hardware interrupt. A hardware interrupt is
requested on the host bus when three conditions occur:
A bit is set in the HcInterruptStatus register
The corresponding bit in the HcInterruptEnable register is set
The MasterInterruptEnable bit is set.
Writing logic 1 to a bit in this register sets the corresponding bit, whereas writing
logic 0 to a bit in this register leaves the corresponding bit unchanged. On a read, the
current value of this register is returned.
Code (Hex): 04 —
read
Code (Hex): 84 —
write
Bit
Symbol
Reset
Access
7
6
5
4
3
2
1
0
reserved
0
R/W
RHSC
0
R/W
FNO
0
R/W
UE
0
R/W
RD
0
R/W
SF
0
R/W
reserved
0
R/W
SO
0
R/W
Table 15:
Bit
31 to 7
6
HcInterruptStatus register: bit description
Symbol
Description
reserved
RHSC
RootHubStatusChange:
This bit is set when the content of
HcRhStatus or the content of any of HcRhPortStatus[1:2] has
changed.
FNO
FrameNumberOverflow:
This bit is set when the MSB of
HcFmNumber (bit 15) changes value.
UE
UnrecoverableError:
This bit is set when the HC detects a
system error not related to USB. The HC does not proceed with
any processing nor signaling before the system error has been
corrected. The HCD clears this bit after the HC has been reset.
OHCI: Always set to logic 0.
RD
ResumeDetected:
This bit is set when the HC detects that a
device on the USB is asserting resume signaling from a state of no
resume signaling. This bit is not set when HCD enters the
USBResume state.
SF
StartofFrame:
At the start of each frame, this bit is set by the HC
and an SOF is generated.
-
reserved
SO
SchedulingOverrun:
This bit is set when the USB schedules for
current frame overruns. A scheduling overrun will also cause the
SchedulingOverrunCount of HcCommandStatus to be
incremented.
5
4
3
2
1
0
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ISP1161ABD,118 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,151 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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