參數(shù)資料
型號(hào)： ISP1161ABD
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù)： 21/134頁(yè)
文件大?。?/td> 587K
代理商： ISP1161ABD
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Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
21 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
To re-enable the interrupt generation:
1. Set all bits in the Hc
μ
PInterrupt register.
2. Set bit InterruptPinEnable to logic 1.
Remark:
Bit InterruptPinEnable in the HcHardwareConfiguration register latches the
interrupt output. When this bit is set to logic 0, the interrupt output will remain
unchanged, regardless of any operations on the interrupt control registers.
If INT1 is asserted, and the HCD wishes to temporarily mask off the INT signal
without clearing the Hc
μ
PInterrupt register, the following procedure should be
followed:
1. Make sure that bit InterruptPinEnable is set to logic 1.
2. Clear all bits in the Hc
μ
PInterruptEnable register.
3. Set bit InterruptPinEnable to logic 0.
To re-enable the interrupt generation:
1. Set all bits in the Hc
μ
PInterruptEnable register according to the HCD
requirements.
2. Set bit InterruptPinEnable to logic 1.
8.6.3
DC interrupt output pin (INT2)
The four configuration modes of DC’s interrupt output pin INT2 can also be
programmed by setting bits INTPOL and INTLVL of the DcHardwareConfiguration
register (BBH - read, BAH - write). Bit INTENA of the DcMode register (B9H - read,
B8H - write) is used to enable pin INT2.
Figure 21
shows the relationship between the
interrupt events and pin INT2.
Each of the indicated USB events is logged in a status bit of the DcInterrupt register.
Corresponding bits in the Interrupt Enable register determine whether or not an event
will generate an interrupt.
Interrupts can be masked globally by means of the INTENA bit of the DcMode
register (see
Table 81
).
The active level and signalling mode of the INT output is controlled by the INTPOL
and INTLVL bits of the DcHardwareConfiguration register (see
Table 83
). Default
settings after reset are active LOW and level mode. When pulse mode is selected, a
pulse of 166 ns is generated when the OR-ed combination of all interrupt bits
changes from logic 0 to logic 1.
Bits RESET, RESUME, SP_EOT, EOT and SOF are cleared upon reading the
DcInterrupt register. The endpoint bits (EP0OUT to EP14) are cleared by reading the
associated DcEndpointStatus register.
Bit BUSTATUS follows the USB bus status exactly, allowing the firmware to get the
current bus status when reading the DcInterrupt register.
SETUP and OUT token interrupts are generated after the DC has acknowledged the
associated data packet. In bulk transfer mode, the DC will issue interrupts for every
ACK received for an OUT token or transmitted for an IN token.
相關(guān)PDF資料
PDF描述
ISP1161ABM Full-speed Universal Serial Bus single-chip host and device controller
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161ABD,118 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,151 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD-S 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161ABD-T 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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