參數(shù)資料
型號： ISP1161A
廠商： NXP Semiconductors N.V.
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： 全速通用串行總線的單芯片主機和設(shè)備控制器
文件頁數(shù)： 20/134頁
文件大?。?/td> 587K
代理商： ISP1161A
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
20 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
There are two groups of interrupts represented by group 1 and group 2 in
Figure 20
.
A pair of registers control each group.
Group 2 contains six possible interrupt events (recorded in the HcInterruptStatus
register). On occurrence of any of these events, the corresponding bit would be set to
logic 1; and if the corresponding bit in the HcInterruptEnable register is also logic 1,
the 6-input OR gate would output logic 1. This output is ANDed with the value of MIE
(bit 31 of HcInterruptEnable). Logic 1 at the AND gate will cause bit OPR in the
Hc
μ
PInterrupt register to be set to logic 1.
Group 1 contains six possible interrupt events, one of which is the output of group 2
interrupt sources. The Hc
μ
PInterrupt and Hc
μ
PInterruptEnable registers work in the
same way as the HcInterruptStatus and HcInterruptEnable registers in the interrupt
group 2. The output from the 6-input OR gate is connected to a latch, which is
controlled by InterruptPinEnable (bit 0 of the HcHardwareConfiguration register).
In the event in which the software wishes to temporarily disable the interrupt output of
the ISP1161A Host Controller, the following procedure should be followed:
1. Make sure that bit InterruptPinEnable in the HcHardwareConfiguration register is
set to logic 1.
2. Clear all bits in the Hc
μ
PInterrupt register.
3. Set bit InterruptPinEnable to logic 0.
Fig 20. HC interrupt logic.
MGT945
S
A
A
O
H
HcμPInterrupt
register
HcInterruptEnable
register
HcInterruptStatus
register
C
RHSC
FNO
UE
RD
SF
SO
RHSC
FNO
UE
RD
SF
SO
MIE
OR
S
A
A
O
H
HcμPInterruptEnable
register
C
OR
LATCH
INT1
group 2
InterruptPinEnable
HcHardwareConfiguration
register
g
LE
相關(guān)PDF資料
PDF描述
ISP1161ABD Full-speed Universal Serial Bus single-chip host and device controller
ISP1161ABM Full-speed Universal Serial Bus single-chip host and device controller
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*