參數(shù)資料
型號: ISP1161A
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: 全速通用串行總線的單芯片主機和設(shè)備控制器
文件頁數(shù): 123/134頁
文件大小: 587K
代理商: ISP1161A
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
123 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
18.2.10
EOT timing in DC burst mode DMA
(1) Programmable polarity: shown as active LOW.
Fig 60. DC burst mode DMA timing.
004aaa115
DACK2
(1)
DREQ2
tRSIH
tILRP
tIHIL
tIHAP
RD or WR
Table 126: Dynamic characteristics: EOT timing in DC burst mode DMA
Symbol
Parameter
t
EOT
EOT pulse width
Conditions
EOT on;
DACK on;
RD/WR LOW
Min
22
Typ
-
Max
-
Unit
ns
t
ISRP
t
RLIS
t
WLIS
DREQ off after input EOT on
input EOT on after RD LOW
input EOT on after WR LOW
-
-
-
-
-
-
40
89
89
ns
ns
ns
(1) The EOT condition is considered valid if DACK2, RD/WR and EOT are all active (= LOW).
(2) Programmable polarity: shown as active LOW.
Fig 61. EOT timing in DC burst mode DMA.
004aaa116
DACK2
(2)
DREQ2
tISRP
tEOT
(1)
RD/WR
EOT
(2)
tRLIS
tWLIS
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ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
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