參數(shù)資料
型號: ISP1161A
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: 全速通用串行總線的單芯片主機和設(shè)備控制器
文件頁數(shù): 105/134頁
文件大小: 587K
代理商: ISP1161A
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
105 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Code (Hex): B2/B3 —
write/read Scratch register
Transaction —
write/read 1 word
13.3.4
Read Frame Number (R: B4H)
This command returns the frame number of the last successfully received SOF. It is
followed by reading one word from the DcFrameNumber register, containing the
frame number. The DcFrameNumber register is shown in
Table 103
.
Remark:
After a bus reset, the value of the DcFrameNumber register is undefined.
Code (Hex): B4 —
read frame number
Transaction —
read 1 word
[1]
Reset value undefined after a bus reset.
Table 101: DcScratch register: bit allocation
Bit
15
Symbol
Reset
0
Access
R/W
Bit
7
Symbol
Reset
0
Access
R/W
14
13
12
11
10
9
8
reserved
0
R/W
6
SFIRH[4:0]
0
R/W
2
0
0
0
0
0
R/W
5
R/W
4
R/W
3
R/W
1
R/W
0
SFIRL[7:0]
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 102: DcScratch register: bit description
Bit
Symbol
15 to 13
-
12 to 0
SFIR[12:0]
Description
reserved; must be logic 0
Scratch Information register
Table 103: DcFrameNumber register: bit allocation
Bit
15
Symbol
Reset
[1]
0
Access
R
Bit
7
Symbol
Reset
[1]
0
Access
R
14
13
12
11
10
9
8
reserved
0
R
5
SOFRH[2:0]
0
R
1
0
R
6
0
R
4
0
R
3
0
R
2
0
R
0
SOFRL[7:0]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
Table 104: DcFrameNumber register: bit description
Bit
Symbol
Description
15 to 11
-
reserved
10 to 8
SOFRH[2:0] SOF frame number (part of upper byte)
7 to 0
SOFRL[7:0]
SOF frame number (lower byte)
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