參數(shù)資料
型號: ISP1161
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: 全速通用串行總線的單芯片主機(jī)和設(shè)備控制器
文件頁數(shù): 8/127頁
文件大?。?/td> 2762K
代理商: ISP1161
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
8 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
D6
6
I/O
bit 6 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 7 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 8 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 9 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 10 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 11 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 12 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 13 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 14 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 15 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
voltage holding pin; this pin is internally connected to the
V
reg(3.3)
and V
hold2
pins. When the V
CC
pin is connected to
+5 V, this pin will output 3.3 V, hence it should not be
connected to +5 V. When the V
CC
pin is connected to
+3.3 V, this pin can either be connected to +3.3 V or left
unconnected. In
all
cases this pin should be decoupled to
DGND.
no connection
chip select input
read strobe input
write strobe input
voltage holding pin; this pin is internally connected to the
V
reg(3.3)
and V
hold1
pins. When the V
CC
pin is connected to
+5 V, this pin will output 3.3 V, hence it should not be
connected to +5 V. When the V
CC
pin is connected to
+3.3 V, this pin can either be connected to +3.3 V or left
unconnected. In
all
cases this pin should be decoupled to
DGND.
HC’s DMA request output (programmable polarity); signals
to the DMA controller that the ISP1161 wants to start a
DMA transfer; see HcHardwareConfiguration register
(20H/A0H)
D7
7
I/O
DGND
D8
8
9
-
I/O
D9
10
I/O
D10
11
I/O
D11
12
I/O
D12
13
I/O
D13
14
I/O
DGND
D14
15
16
-
I/O
D15
17
I/O
DGND
V
hold1
18
19
-
-
n.c.
CS
RD
WR
V
hold2
20
21
22
23
24
-
I
I
I
-
DREQ1
25
O
Table 2:
Symbol
[1]
Pin description for LQFP64
…continued
Pin
Type
Description
相關(guān)PDF資料
PDF描述
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
ISP1161BM Full-speed Universal Serial Bus single-chip host and device controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20