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參數(shù)資料
| 型號(hào)： | IS3-L67132L-55 |
| 廠(chǎng)商： | TEMIC SEMICONDUCTORS |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 2K X 8 DUAL-PORT SRAM, 55 ns, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大?。?/td> | 178K |
| 代理商： | IS3-L67132L-55 |
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L67132/L67142
Rev. D (19 Fev. 97)
1
MATRA MHS
Introduction
The L67132/67142 are very low power CMOS dual port
static RAMs organized as 2048
× 8. They are designed to
be used as a stand-alone 8 bit dual port RAM or as a
combination MASTER/SLAVE dual port for 16 bits or
more width systems. The MHS MASTER/SLAVE dual
port approach in memory system applications results in
full speed, error free operation without the need for
additional discrete logic.
Master and slave devices provide two independent ports
with separate control, address and I/O pins that permit
independent, asynchronous access for reads and writes to
any location in the memory. An automatic power down
feature controlled by CS permits the onchip circuitry of
each port in order to enter a very low stand by power
mode.
Using an array of eight transistors (8T) memory cell and
fabricated with the state of the art 1.0
m lithography
named
SCMOS,
the
L67132/67142
combine
an
extremely low standby supply current (typ = 1.0
A) with
a fast access time at 45 ns over the full temperature range.
All versions offer battery backup data retention capability
with a typical power consumption at less than 5
W.
For military/space applications that demand superior
levels of performance and reliability the L67132/67142
is processed according to the methods of the latest
revision of the MIL STD 883 (class B or S) and/or ESA
SCC 9000.
Features
D Single 3.3 V ± 0.3 volt power supply
D Fast access time
45(*) ns to 70 ns
D 67132L/67142L low power
67132V/67142V very low power
D Expandable data bus to 16 bits or more using master/slave
devices when using more than one device
(*) Preliminary
D On chip arbitration logic
D BUSY output flag on master
D BUSY input flag on slave
D Fully asynchronous operation from either port
D Battery backup operation :
2 V data retention
2 K
× 8 CMOS Dual Port RAM 3.3 Volt
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IRD-L67132L-70 | 2K X 8 DUAL-PORT SRAM, 70 ns, PQFP64 |
| I4K-L67142V-55 | 2K X 8 DUAL-PORT SRAM, 55 ns, CQCC48 |
| M1K-L67142L-70/883 | 2K X 8 DUAL-PORT SRAM, 70 ns, CDIP48 |
| IS32WV10008ALL-85BI | 1M X 8 PSEUDO STATIC RAM, 85 ns, PBGA48 |
| IS42LS16800A | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS3RV733-IP65 | 制造商:BACO Controls Inc 功能描述: |
| IS-400 | 制造商:BRAINBOXES 功能描述:CARD SERIAL PCI RS232 4PORT 制造商:Brainboxes 功能描述:INTASHIELD PCI 4XRS232 |
| IS40D | 制造商:IDEC CORPORATION 功能描述:SENS.IND. 10-30VDC PNP NO NC |
| IS40DK | 制造商:IDEC CORPORATION 功能描述:SENS.IND. 10-30VDC PNP NO NC |
| IS41 | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NO |
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