參數(shù)資料
型號(hào)： IR1110
廠商： International Rectifier
英文描述： SOFT START CONTROLLER IC
中文描述： 軟起動(dòng)控制器芯片
文件頁數(shù)： 17/32頁
文件大?。?/td> 227K
代理商： IR1110
17
IR1110
ADVANCE INFORMATION
www.irf.com
of the load connected to the DC bus. The rate of increase of applied |V
BUSREF
| should be limited if
necessary, to limit the bus capacitor charging current.
Adjustment of DC loop gain
The voltage regulation loop may exhibit uneven firing angle from one SCR to the next, with
loads which have unusually high ripple voltage. Such ripple instability, if it occurs, can be corrected by
reducing the DC loop gain. Figure 6 shows how this is done with a voltage divider, R1 and R2, in the
voltage regulation loop.
SCR Timing Comparators
Each SCR Timing Comparator delivers a high output whenever the Timing Wave is instanta-
neously greater than the Timing Wave Reference. The leading edge is the demanded initiation point
for the SCR firing pulse.
The duration of the output pulse of the SCR timing comparator is generally much longer than
needed to fire the SCR, because the Timing Wave remains higher than the Timing Wave Reference
for a significant portion, if not all, of the total cycle time. See Figure 5.
SCR Voltage Comparators
Each SCR Voltage Comparator compares the instantaneous anode-cathode voltage of the
SCR with a fixed reference, SCR
REF
, which is set by R
SG1
and R
SG2
. This reference is set to repre-
sent an actual anode-cathode voltage of about 15V, before attenuation through the input divider
resistors.
When the instantaneous SCR anode voltage is greater than 15V, the output of the SCR
Voltage comparator is high. The outputs of the SCR Voltage and Timing Comparators are ANDed to
obtain the output SCR timing pulses, SCRU, SCRV, SCRW.
The SCRU, SCRV, SCRW output pulses are thus controlled so that;
a) they do not occur when the Timing Wave is less than the Timing Wave Reference
b) they do not occur unless the instantaneous SCR voltage is at least 15V positive
c) they are terminated when the instantaneous anode-cathode voltage falls below 15V; -i.e. as soon
as the SCR turns on
With discontinuous output current, more than one firing pulse per cycle for each SCR may be
generated.
The pulse width of SCRU, SCRV, SCRW is about 6usec at maximum output voltage, and
about 13usec at reduced output voltage.
SCR Gate Drivers
The SCR gate driver circuit, shown in Figure 7, amplifies and stretches the SCRU, SCRV,
SCRW timing pulses. C1 and R2 stretch the duration of the output pulse to 60-80usec. This is
generally necessary to ensure reliable SCR turn-on.
C2 and R4 provide an initial peak turn-on firing current of about .45A, decaying to about .2A
within 5usec. The maximum average current consumed by the three SCR driver circuits is about
10mA.
If C2 and R4 are omitted, the peak firing current will be reduced to about .2A. R3 can be
decreased to say 33
W
, to restore the peak firing current to .45A; the maximum average supply
current will now increase to about 20mA.
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