參數(shù)資料
型號(hào)： HT23B60
廠商： Holtek Semiconductor Inc.
英文描述： 60x11 Pixel Data Bank 8-Bit Mask MCU
中文描述： 60x11像素?cái)?shù)據(jù)銀行8位微控制器面膜
文件頁(yè)數(shù)： 18/50頁(yè)
文件大小： 314K
代理商： HT23B60
HT23B60
Rev. 1.10
18
March 1, 2004
The high nibble and bit3 of the WDTS are reserved for
user defined flags, which can be used to indicate some
specified status.
The WDT time-out under Normal mode or Green mode
will initialize chip reset and set the status bit TO . But
in the Sleep mode or Idle mode, the time-out will initial-
ize a warm reset and only the program counter and
stack pointer are reset to 0. To clear the WDT contents
(including the WDT prescaler), three methods are
adopted; external reset (a low level to RES pin), soft-
ware instruction and HALT instruction.
The software instruction include CLR WDT and the
other set CLR WDT1 and CLR WDT2 . Of these two
types of instruction, only one can be active depending
on the mask option WDTinstr . If the CLR WDT is se-
lected (i.e. One clear instruction), any execution of the
CLR WDT instruction will clear the WDT. In the case
wherein CLR WDT1 and CLR WDT2 are chosen
(i.e. two clear instructions), these two instructions must
be executed to clear the WDT; otherwise, the WDT may
reset the chip as a result of time-out.
Controller Operation Mode
Data bank controllers support two system clocks and
four operation modes. The system clock could be
32768Hz or 3.58MHz and the operation mode could be
Normal, Green, Sleep or Idle mode. There are all se-
lected by the software.
The following conditions will force the operation mode to
change to Green mode:
Any reset condition from any operation mode
Any interrupt from Sleep mode or Idle mode
A falling edge on any pin of Port A from Sleep mode or
Idle mode
How to change the Operation Mode
Normal mode to Green mode:
Step 1: Clear MODE1 to 0
After step 1, operation mode is changed to Green
mode but the PLLEN status has no change.
However, PLLEN can be cleared by software.
-
/
0 1 "
= A 7
-
.
-
/
% A 7
-
* A
A ' -
.
-
A
.
& 5 .
(
0
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.
-
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Watchdog Timer
Register
Label
Bits
R/W
Function
OPMODE
(26H)
4~0
RO
Unused bit, read as 0
PLLEN
5
RW
1: Enable the frequency up conversion function to generate 3.58MHz
0: Disable the frequency up conversion function to generate 3.58MHz
MODE0
6
RW
0: Enable the 32768Hz oscillator while the HALT instruction is executed
1:Disablethe32768Hzoscillatorwhilethe HALT instructionisexecuted
MODE1
7
RW
1: Select 3.58MHz as CPU system clock
0: Select 32768Hz as CPU system clock
Operation Mode Description
HALT
Instruction
MODE1
MODE0
PLLEN
Operation
Mode
32768Hz
3.58MHz
System
Clock
Not Execute
1
X
1
Normal
ON
ON
3.58MHz
Not Execute
0
X
0
Green
ON
OFF
32768Hz
Executed
0
0
0
Sleep
ON
OFF
HALT
Executed
0
1
0
Idle
OFF
OFF
HALT
Note: X means don t care
相關(guān)PDF資料
PDF描述
HT23B60-100QFP-A 60x11 Pixel Data Bank 8-Bit Mask MCU
HT23C010 CMOS 128K x 8-Bit Mask ROM(CMOS 128K x 8位掩模式ROM)
HT23C020 CMOS 256K x 8-Bit Mask ROM(CMOS 256K x 8位掩模式ROM)
HT23C040 CMOS 512K x 8-Bit Mask ROM(CMOS 512K x 8位掩模式ROM)
HT23C128 CMOS 16Kx 8-Bit Mask ROM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HT23B60-100QFP-A 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:60x11 Pixel Data Bank 8-Bit Mask MCU
HT23C010 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:CMOS 128Kⅴ 8-Bit Mask ROM
HT23C020 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:CMOS 256Kx 8-Bit Mask ROM
HT23C040 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:CMOS 512Kx8-Bit Mask ROM
HT23C040H 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:CMOS 512K?8-Bit High Speed Mask ROM
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