HT23B60
Rev. 1.10
11
March 1, 2004
through the memory pointer registers (MP0;01H,
MP1;03H).
Bank 1~11(BP4~PB0=0001B~1011B)
The range of RAM starting from 40H to FFH are for
general purpose. Only MP1 can deal with the memory
of this range.
Bank 15 (BP4~BP0=1111B)
The range of RAM starts from 80H to FBH (BCH~BFH
can t be used). Every bit stands for one dot on the
LCD. If the bit is 1 , the light of the dot on the LCD will
be turned on. If the bit is 0 , then it will be turned off.
Only MP1 can deal with the memory of this range.
The contrast form of RAM location, COMMON, and
SEGMENT is as follows.
LCD Driver Output
The maximum output number of the HT23B60 LCD
driver is 11 60. The Common output signal can be se-
lected as 11 com or 10 com and 1/4 or 1/5 bias by mask
option. The LCD driver used the voltage of VLCD pin to
the power source. To adjust the view angle, the pro-
grammer can select the real LCD power by the register
34H. Some of the Segment outputs share pins with
keyscan outputs (seg0~15). Whether segment output or
keyscan outputs can be determined by software option.
LCD driver output can be enabled or disabled by setting
the LCD (bit7 of LCDC; 2DH) without the influence of the
related memory condition. Only MP1 can deal with the
memory of this range. The contrast form of RAM loca-
tion, COMMON and SEGMENT is as follows:
Register Label Bits R/W
Function
LCDC
(2DH)
0~1 RO Unused bit, read as 0
LVEN
2
RW
To enable/disable the low
voltage detection function
(0: disable; 1: enable)
3
R
Unused bit, read as 0
LVFG
4
RO
1: LBIN pin voltage is less
than low voltage
detection level
0: LBIN voltage is not less
than low voltage
detection level
5, 6
R
Unused bit, read as 0
LCDON
7
RW
To enable/disable the
LCD output
(0: disable; 1: enable)
LCDC Register
'
& & +
& ' +
& ( +
& ) +
& " +
& # +
& $ +
& % +
& * +
& = +
&
+
& 3 +
&
+
&
+
& 6 +
& 4 +
' & +
' ' +
' ( +
' ) +
' " +
' # +
' $ +
' % +
' * +
' = +
'
+
' 3 +
'
+
3
3
- 1
-
-
- 1
-
/ -
3 - 1
-
-
3 - 1
-
/ -
/ -
-
-
/ - 3
-
- '
7 / -
- +
A
- 3
-
4
'
+
' 6 +
' 4 +
( & +
( ' +
( ( +
( ) +
( " +
( # +
( $ +
( % +
( * +
( = +
(
+
( 3 +
(
+
(
+
( 6 +
( 4 +
) & +
) ' +
) ( +
) ) +
) 4 +
" & +
4 4 +
" & +
4 4 +
D -
/ -
3
0 - & -
-
> ' = ( - 3
/ -
3
0 - ' -
-
> ' = ( - 3
&
&
'
'
3
3
3
+
.
&
& +
&
&
-
-
- &
-
- &
-
-
- '
-
- '
3
0 -
/
-
-
;
A 7
-
7 / -
-
;
A
- 3
-
7 / - +
A
- 3
-
.
-
-
-
-
-
-
/ -
- &
-
- & - +
A
- 3
-
-
- & -
;
A
- 3
-
-
- & -
/ -
6
( +
(
(
/ -
-
/
0 -
/ -
-
- >
-
/
-
- ( - +
A
- 3
-
-
- ( -
;
A
- 3
-
-
- ( -
/ -
-
8
-
/ -
4
-
/ -
.
.
.
-
/ -
.
-
-
/ -
/ -
/ -
-
<
- 3
-
/ -
-
-
/ / A
-
/ -
- 3 -
/ / A
-
/ -
-
-
- & -
-
-
-
- & -
/ -
-
-
- ' -
-
-
-
- ' -
/ -
) " +
) # +
) $ +
) % +
) * +
) = +
)
+
+
3
+
) 3 +
/ -
3
0 - ' ' -
-
> ' = ( - 3
" & +
4 4 +
* & +
4 3 +
3
0 - ' # -
-
> ' ( & - 3
3 +
RAM Mapping