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參數(shù)資料
| 型號： | HPLL-8001 |
| 英文描述： | PLL Frequency Synthesizer(鎖相環(huán)頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器（鎖相環(huán)頻率合成器） |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 77K |
| 代理商： | HPLL-8001 |
6
Input-Output PO2 Programmable Input-Output (pin 13)
Symbol
Parameters and Test Conditions
Units
Min
Typ
Max
V
OH
Voltage Output High
I
OH
= 2 mA, V
DD
= 4.5–5.5V
I
OH
= 1.2 mA, V
DD
= 2.7– 3.3V
I
OL
= 2 mA, V
DD
= 4.5–5.5V
I
OL
= 1.2 mA, V
DD
= 2.7– 3.3V
V
DD
= 4.5–5.5V, MF01, MF02, C
L
= 10 pF
V
DD
= 2.7– 3.3V, MF01, MF02, C
L
= 10 pF
V
DD
= 4.5–5.5V, MF01, MF02, C
L
= 10 pF
V
DD
= 2.7– 3.3V, MF01, MF02, C
L
= 10 pF
Reference Voltage, Iref = 100
μ
A
V
V
V
V
ns
ns
VDD–0.8
VDD–0.8
V
OL
Voltage Output Low
0.8
0.8
4
6
T
F
Fall Time
3
5
T
R
Rise Time
ns
6
7
ns
V
12
1.1
14
1.3
V
REF
0.8
Output LD Lock Detect (pin 14)
Symbol
Parameters and Test Conditions
Units
Min
Typ
Max
V
OL
Voltage Output Low
I
OL
= 0.5 mA, V
DD
= 5V
I
OL
= 0.5 mA, V
DD
= 2.7V
V
DD
= 4.5–5.5V
V
DD
= 2.7– 3.3V
V
V
ns
ns
0.8
0.8
6
10
T
F
Fall Time
5
8
VIH
VIL
INPUT
10%
50%
10%
90%
90%
VOH
OUTPUT
VOL
50%
T
f
T
r
T
PLH
T
PLH
T
W
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