參數(shù)資料
型號: HM65W8512
廠商: Hitachi,Ltd.
英文描述: 4 M PSRAM (512-kword ×8-bit)(4 M PSRAM (512k字 ×8位))
中文描述: 4個M移動存儲芯片(512 KWord的× 8位)(4個M移動存儲芯片(為512k字× 8位))
文件頁數(shù): 1/20頁
文件大小: 160K
代理商: HM65W8512
HM65W8512 Series
4 M PSRAM (512-kword
×
8-bit)
2 k Refresh
ADE-203-289C(Z)
Rev. 3.0
Nov. 1997
Description
The Hitachi HM65W8512 is a CMOS pseudo static RAM organized 512-kword
×
8bit. It realizes higher
density, higher performance and low power consumption by employing 0.8
μ
m Hi-CMOS process
technology.
It offers low power data retention by self refresh mode. It also offers easy non multiplexed address
interface and easy refresh functions. HM65W8512 is suitable for handy systems which work with battery
back-up systems.
The device is packaged in a small 525-mil SOP (460-mil body SOP) or a 400 mil TSOP TYPE II.
Features
Single 3.3 V (
±
0.3V)
High speed
Access time
CE
access time: 120/150 ns (max)
Cycle time
Random read/write cycle time:
190/230 ns (min)
Low power
Active: 100 mW (typ)
Standby: 85
μ
W (typ)
Directly TTL/CMOS compatible
All inputs and outputs
Simple address configuration
Non multiplexed address
Refresh cycle
2048 refresh cycles: 32 ms
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