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參數(shù)資料
| 型號(hào)： | HB52E649E12 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 512 MB Registered SDRAM DIMM(512 MB 寄存同步DRAM DIMM) |
| 中文描述： | 注冊(cè)使用512 MB SDRAM的內(nèi)存（512 MB的寄存同步的DRAM內(nèi)存） |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大小： | 541K |
| 代理商： | HB52E649E12 |
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HB52E649E12-A6B/B6B
13
AC Characteristics (Ta = 0 to 55
°
C, V
CC
= 3.3 V
±±
0.3 V, V
SS
= 0 V)
Notes: 1. AC measurement assumes t
T
= 1 ns. Reference level for timing of input signals is 1.5 V.
2. Access time is measured at 1.5 V. Load condition is C
L
= 50 pF.
3. t
LZ
(max) defines the time at which the outputs achieves the low impedance state.
4. t
HZ
(max) defines the time at which the outputs achieves the high impedance state.
5. t
CES
defines CKE setup time to CK rising edge except power down exit command.
Test Conditions
Input and output timing reference levels: 1.5 V
Input waveform and output load: See following figures
Parameter
System clock cycle time
(CE latency = 3)
(CE latency = 4)
CK high pulse width
CK low pulse width
Access time from CK
(CE latency = 3)
(CE latency = 4)
Data-out hold time
CK to Data-out low impedance
CK to Data-out high impedance
Data-in setup time
Data in hold time
Address setup time
Address hold time
CKE setup time
CKE setup time for power down exit
CKE hold time
Command setup time
Command hold time
Ref/Active to Ref/Active command period t
RC
Active to precharge command period
Active command to column command
(same bank)
Precharge to active command period
Write recovery or data-in to precharge
lead time
Active (a) to Active (b) command period t
RRD
Transition time (rise to fall)
Refresh period
HITACHI-
Symbol
t
CK
PC100
Symbol
Tclk
HB52E649E12
-A6B/B6B
Min
10
Unit
ns
Notes
1
Max
——
t
CK
t
CKH
t
CKL
t
AC
Tclk
Tch
Tcl
Tac
10
4
4
——
——
——
——
6.9
ns
ns
ns
ns
1
1
1, 2
t
AC
t
OH
t
LZ
t
HZ
t
DS
t
DH
t
AS
t
AH
t
CES
t
CESP
t
CEH
t
CS
t
CH
Tac
Toh
——
2.1
1.1
——
2.9
1.9
2.6
1.6
2.6
2.6
1.6
2.6
1.6
70
50
20
6.9
——
——
6.9
——
——
——
——
——
——
——
——
——
——
120000
——
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1, 2
1, 2, 3
1, 4
1
1
1
1, 5
1, 5
1
1
1
1
1
1
1
Tsi
Thi
Tsi
Thi
Tsi
Tpde
Thi
Tsi
Thi
Trc
Tras
Trcd
t
RAS
t
RCD
t
RP
t
DPL
Trp
Tdpl
20
10
——
——
ns
ns
1
1
Trrd
20
1
——
——
5
64
ns
ns
ms
1
t
T
t
REF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB52E649E12-A6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649E12-B6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649EN-A6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Unbuffered SDRAM DIMM, 100 MHz Memory Bus |
| HB52E649EN-B6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Unbuffered SDRAM DIMM, 100 MHz Memory Bus |
| HB52E88EM-B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
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