參數(shù)資料
型號(hào)： GS8180S36
廠商： GSI TECHNOLOGY
英文描述： 512K x 36Bit Separate I/O Sigma DDR SRAM(512K x 36位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫(xiě)模式靜態(tài)ΣRAM)
中文描述： 為512k × 36Bit分離I / O西格瑪?shù)腄DR SRAM的（為512k × 36位獨(dú)立的I / O接口雙數(shù)據(jù)速率讀和寫(xiě)模式靜態(tài)ΣRAM）
文件頁(yè)數(shù)： 7/32頁(yè)
文件大?。?/td> 853K
代理商： GS8180S36
Rev: 1.01 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
7/32
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8180S09/18/36B-333/300/275/250
Separate I/O SRAMs, from a system architecture point of view, are attractive in applications where alternating reads and writes are
needed. Therefore, the Sigma RAM Separate I/O interface and truth table are optimized for alternating reads and writes. Separate I/
O SRAMs are unpopular in applications where multiple reads multiple writes are needed because burst read or write transfers from
Separate I/O SRAMs cut the RAM’s bandwidth in half. Separate I/O Sigma RAMs offer users the simplest possible control scheme
for back-to-back read-write operations.
Although the Separate I/O Sigma RAM family of pinouts has been designed to support Single and Double Data Rate options, not
all Sigma RAM implementations will support both protocols. The following timing diagrams provide a quick comparison between
the SDR and DDR protocol options available in the context of the Separate Sigma RAM standard. This particular data sheet covers
the Single Data Rate (SDR) Separate
I/O Sigma RAM.
The character of the applications for fast synchronous SRAMs in networking systems are extremely diverse.
Σ
RAMs have been
developed to address the diverse needs of the networking market in a manner that can be supported with a unified development and
manufacturing infrastructure.
Σ
RAMs address each of the bus protocol options commonly found in networking systems.
Sigma RAM Bandwidth at 333 Mhz Clocking
Configuration
Common I/O
Common I/O
Separate I/O
Separate I/O
x9
3
6
6
12
x18
6
12
12
24
x36
12
24
24
48
x72
24
48
48
96
Units
Gb/s
Gb/s
Gb/s
Gb/s
SDR
DDR
SDR
DDR
Mode Selection Truth Table Standard
M2
0
0
0
0
1
1
1
1
M3
0
0
1
1
0
0
1
1
M4
0
1
0
1
0
1
0
1
Function
RFU
RFU
RFU
Double Data Rate
RFU
RFU
Late Write, Pipelined Read
RFU
In This Data Sheet
n/a
n/a
n/a
No
n/a
n/a
Yes
n/a
相關(guān)PDF資料
PDF描述
GS8180S18 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫(xiě)模式靜態(tài)ΣRAM)
GS8180S09 2Mb x 9Bit Separate I/O Sigma DDR SRAM(2M x 9位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫(xiě)模式靜態(tài)ΣRAM)
GS820322T-138 64K x 32 2M Synchronous Burst SRAM
GS82032Q-100 64K x 32 2M Synchronous Burst SRAM
GS82032Q-117 64K x 32 2M Synchronous Burst SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8182D08BD-167 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 16MBIT 2MX8 0.5NS 165FPBGA - Trays
GS8182D08BD-250 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 16MBIT 2MX8 0.45NS 165FPBGA - Trays
GS8182D08BD-375 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 16MBIT 2MX8 0.45NS 165FPBGA - Trays
GS8182D09BD-400 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 18MBIT 2M X 9 0.45NS 165FPBGA - Trays
GS8182D18BD-167 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 18MBIT 1MX18 0.5NS 165FPBGA - Trays
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