參數(shù)資料
型號(hào)： GM5110-H
廠商： Electronic Theatre Controls, Inc.
英文描述： XGA/SXGA LCD Controller
中文描述： 的XGA / SXGA LCD控制器
文件頁數(shù)： 29/51頁
文件大?。?/td> 1379K
代理商： GM5110-H
***
Genesis Microchip Confidential ***
gm5110/20 Preliminary Data Sheet
June 2002
22
C5110-DAT-01C
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The gm5110/20 has an Input Format Measurement block (the IFM) providing the capability
of measuring the horizontal and vertical timing parameters of the input video source. This
information may be used to determine the video format and to detect a change in the input
format. It is also capable of detecting the field type of interlaced formats.
The IFM features a programmable reset, separate from the regular gm5110/20 soft reset.
This reset disables the IFM, reducing power consumption. The IFM is capable of operating
while gm5110/20 is running in power down mode.
Horizontal measurements are measured in terms of the selected IFM_CLK (either TCLK or
RCLK/4), while vertical measurements are measured in terms of HSYNC pulses.
For an overview of the internally synthesized clocks, see section 4.1.
4.6.1 HSYNC / VSYNC Delay
The active input region captured by the gm5110/20 is specified with respect to internal
HSYNC and VSYNC. By default, internal syncs are equivalent to the HSYNC and VSYNC
at the input pins and thus force the captured region to be bounded by external HSYNC and
VSYNC timing. However, the gm5110/20 provides an internal HSYNC and VSYNC delay
feature that removes this limitation. This feature is available for use with both the ADC input
and the DVI Rx (DE-regeneration mode). By delaying the sync internally, the gm5110/20
can capture data that spans across the sync pulse.
It is possible to use HSNYC and VSYNC delay for image positioning. (Alternatively,
Source_HSTART and Source_VSTART in Figure 12 are used for image positioning of
analog input.) Taken to an extreme, the intentional movement of images across apparent
HSYNC and VSYNC boundaries creates a horizontal and/or vertical wrap effect.
HSYNC is delayed by a programmed number of selected input clocks.
HS(system)
active
active
capture
HS(internal)
capture
capture
programmable
delay
input block actually
captures across HSYNC
Figure 14.
HSYNC Delay
Delayed horizontal sync may be used to solve a potential problem with VSYNC jitter with
respect to HSYNC. VSYNC and HSYNC are generally driven active coincidentally, but
with different paths to the gm5110/20 (HSYNC is often regenerated from a PLL). As a
result, VSYNC may be seen earlier or later. Because VSYNC is used to reset the line
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