參數(shù)資料
型號: EP20K60EQC208
廠商: ALTERA CORP
元件分類: PLD
英文描述: LOADABLE PLD, PQFP208
封裝: 30.40 X 30.40 MM, 0.50 MM PITCH, PLASTIC, QFP-208
文件頁數(shù): 17/114頁
文件大?。?/td> 4116K
代理商: EP20K60EQC208
IGLOO nano Packaging
Ad vance v0.3
3-15
Part Number and Revision Date
Part Number 51700110-003-2
Revised December 2008
List of Changes
The following table lists critical changes that were made in the current version of the chapter.
Previous Version
Changes in Current Version (Advance v0.3)
Page
Advance v0.2
(November 2008)
The "36-Pin UC" pin table is new.
Advance v0.1
(October 2008)
The "48-Pin QFN" pin diagram was revised.
Note 2 for the "48-Pin QFN", "68-Pin QFN", and "100-Pin QFN" pin diagrams
was changed to "The die attach paddle of the package is tied to ground
(GND)."
The "100-Pin VQFP" pin diagram was revised to move the pin IDs to the upper
left corner instead of the upper right corner.
相關(guān)PDF資料
PDF描述
EP20K60EQC240 LOADABLE PLD, PQFP240
EP20K60ERC208 LOADABLE PLD, PQFP208
EP20K60ERC240 LOADABLE PLD, PQFP240
EP20K60ETC144 LOADABLE PLD, PQFP144
EP2645ETTS-33.178MTR CRYSTAL OSCILLATOR, CLOCK, 33.178 MHz, HCMOS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K60EQC208-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 256 Macro 148 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K60EQC208-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K60EQC208-1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 256 Macro 148 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K60EQC208-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 256 Macro 148 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K60EQC208-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 256 Macro 148 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256