參數(shù)資料
型號： EFM32TG108F32
廠商： Energy Micro
文件頁數(shù)： 4/136頁
文件大?。?/td> 0K
描述： MCU 32BIT 32KB FLASH 24-QFN
特色產(chǎn)品： EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝： 1
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： EBI/EMI，I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 17
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 24-VQFN 裸露焊盤
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 914-1032-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
101
www.energymicro.com
Bits
Name
Function
[4]
SEVONPEND
Send Event on Pending bit:
0 = only enabled interrupts or events can wakeup the processor, disabled interrupts are
excluded1 = enabled events and all interrupts, including disabled interrupts, can wakeup the
processor.
When an event or interrupt enters pending state, the event signal wakes up the processor
from WFE. If the processor is not waiting for an event, the event is registered and affects the
next WFE.
The processor also wakes up on execution of an SEV instruction or an external event.
[3]
-
Reserved.
[2]
SLEEPDEEP
Controls whether the processor uses sleep or deep sleep as its low power mode:
0 = sleep
1 = deep sleep.
[1]
SLEEPONEXIT
Indicates sleep-on-exit when returning from Handler mode to Thread mode:
0 = do not sleep when returning to Thread mode.
1 = enter sleep, or deep sleep, on return from an ISR.
Setting this bit to 1 enables an interrupt driven application to avoid returning to an empty main
application.
[0]
-
Reserved.
4.3.8 Configuration and Control Register
The CCR controls entry to Thread mode and enables:
the handlers for NMI, hard fault and faults escalated by FAULTMASK to ignore bus faults
trapping of divide by zero and unaligned accesses
access to the STIR by unprivileged software, see Section 4.2.8 (p. 93) .
See the register summary in Table 4.12 (p. 94) for the CCR attributes.
The bit assignments are:
DIV_0_TRP
Reserved
UNALIGN_TRP
NONBASETHRDENA
USERSETMPEND
BFHFNMIGN
STKALIGN
Reserved
31
10 9 8 7
5 4 3 2 1 0
Reserved
Table 4.20. CCR bit assignments
Bits
Name
Function
[31:10]
-
Reserved.
[9]
STKALIGN
Indicates stack alignment on exception entry:
0 = 4-byte aligned1 = 8-byte aligned.
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