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參數(shù)資料
| 型號(hào)： | EBD26UC6AKSA-6B-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | Single Pole Normally Open: 1-Form-A |
| 中文描述： | 32M X 64 DDR DRAM MODULE, 0.7 ns, ZMA200 |
| 封裝： | LEAD FREE, SODIMM-200 |
| 文件頁(yè)數(shù)： | 5/19頁(yè) |
| 文件大?。?/td> | 213K |
| 代理商： | EBD26UC6AKSA-6B-E |
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EBD26UC6AKSA-E
Preliminary Data Sheet E0605E10 (Ver. 1.0)
5
Serial PD Matrix
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
0
Number of bytes utilized by module
manufacturer
Total number of bytes in serial PD
device
1
0
0
0
0
0
0
0
80H
128 bytes
1
0
0
0
0
1
0
0
0
08H
256 bytes
2
Memory type
0
0
0
0
0
1
1
1
07H
DDR SDRAM
3
Number of row address
0
0
0
0
1
1
0
1
0DH
13
4
Number of column address
0
0
0
0
1
0
0
1
09H
9
5
Number of DIMM ranks
0
0
0
0
0
0
1
0
02H
2
6
Module data width
0
1
0
0
0
0
0
0
40H
64 bits
7
Module data width continuation
0
0
0
0
0
0
0
0
00H
0
8
Voltage interface level of this assembly 0
0
0
0
0
1
0
0
04H
SSTL2
9
DDR SDRAM cycle time, CL = X
-6B
0
1
1
0
0
0
0
0
60H
CL = 2.5*
1
-7A, -7B
0
1
1
1
0
1
0
1
75H
10
SDRAM access from clock (tAC)
-6B
0
1
1
1
0
0
0
0
70H
0.7ns
*1
-7A, -7B
0
1
1
1
0
1
0
1
75H
0.75ns
*1
11
DIMM configuration type
0
0
0
0
0
0
0
0
00H
None
7.8
μ
s
Self refresh
×
16
12
Refresh rate/type
1
0
0
0
0
0
1
0
82H
13
Primary SDRAM width
0
0
0
1
0
0
0
0
10H
14
Error checking SDRAM width
0
0
0
0
0
0
0
0
00H
Not used
15
SDRAM device attributes:
Minimum clock delay back-to-back
column access
SDRAM device attributes:
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
0
0
0
0
0
0
0
1
01H
1 CLK
16
0
0
0
0
1
1
1
0
0EH
2,4,8
17
0
0
0
0
0
1
0
0
04H
4
18
SDRAM device attributes: /CAS latency 0
0
0
0
1
1
0
0
0CH
2, 2.5
19
SDRAM device attributes: /CS latency
0
0
0
0
0
0
0
1
01H
0
20
SDRAM device attributes: /WE latency
0
0
0
0
0
0
1
0
02H
1
21
SDRAM module attributes
0
0
1
0
0
0
0
0
20H
Unbuffered
22
SDRAM device attributes: General
1
1
0
0
0
0
0
0
C0H
VDD ± 0.2V
23
Minimum clock cycle time at
CL = X –0.5
-6B, -7A
0
1
1
1
0
1
0
1
75H
CL = 2*
1
-7B
1
0
1
0
0
0
0
0
A0H
24
Maximum data access time (tAC) from
clock at CL = X –0.5
-6B
0
1
1
1
0
0
0
0
70H
0.7ns
*1
-7A, -7B
0
1
1
1
0
1
0
1
75H
0.75ns*
1
25 to 26
0
0
0
0
0
0
0
0
00H
27
Minimum row precharge time (tRP)
-6B
0
1
0
0
1
0
0
0
48H
18ns
-7A, -7B
0
1
0
1
0
0
0
0
50H
20ns
28
Minimum row active to row active delay
(tRRD)
-6B
0
0
1
1
0
0
0
0
30H
12ns
-7A, -7B
0
0
1
1
1
1
0
0
3CH
15ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EBD26UC6AKSA-7A-E | Single Pole Normally Open: 1-Form-A, 400V |
| EBD26UC6AKSA-6B | 256MB DDR SDRAM SO DIMM (32M words x 64 bits, 2 Banks) |
| EBD26UC6AKSA | Single Pole Normally Open: 1-Form-A |
| EBD26UC6AKSA-7A | Single Pole Normally Open: 1-Form-A, 800V |
| EBD26UC6AKSA-7B | Single Pole Normally Open: 1-Form-A |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EBD26UC6AKSA-7A | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256MB DDR SDRAM SO DIMM (32M words x 64 bits, 2 Banks) |
| EBD26UC6AKSA-7A-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256MB DDR SDRAM SO-DIMM (32M words x 64 bits, 2 Ranks) |
| EBD26UC6AKSA-7B | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256MB DDR SDRAM SO DIMM (32M words x 64 bits, 2 Banks) |
| EBD26UC6AKSA-7B-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256MB DDR SDRAM SO-DIMM (32M words x 64 bits, 2 Ranks) |
| EBD26UC6AKSA-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256MB DDR SDRAM SO-DIMM (32M words x 64 bits, 2 Ranks) |
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