The DS3 frame format is shown in Figure 10" />
參數(shù)資料
型號(hào): DS3170+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 217/230頁(yè)
文件大?。?/td> 0K
描述: IC TXRX DS3/E3 100-CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 640
功能: 單芯片收發(fā)器
接口: DS3,E3
電路數(shù): 1
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 120mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LBGA,CSBGA
供應(yīng)商設(shè)備封裝: 100-CSBGA(11x11)
包裝: 托盤
包括: DS3 調(diào)幀器,E3 調(diào)幀器,HDLC 控制器,芯片內(nèi) BERT
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DS3170 DS3/E3 Single-Chip Transceiver
87 of 230
10.6.5.5.1 Receive C-bit DS3 Frame Format
The DS3 frame format is shown in Figure 10-13. X1 and X2 are the Remote Defect Indication (RDI) bits (also
referred to as the far-end SEF/AIS bits). P1 and P2 are the parity bits used for line error monitoring. M1, M2, and M3
are the multiframe alignment bits that define the multiframe boundary. FXY are the subframe alignment bits that
define the subframe boundary.
Note: Both the M-bits and F-bits define the DS3 frame boundary. C11 is the
Application Identification Channel (AIC). C12 is reserved for future network use, and has a value of one. C13 is the
Far-End Alarm and Control (FEAC) signal. C21, C22, and C23 are unused, and have a value of one. C31, C32, and C33
are the C-bit parity bits used for path error monitoring. C41, C42, and C43 are the Far-End Block Error (FEBE) bits
used for remote path error monitoring. C51, C52, and C53 are the path maintenance data link (or HDLC) bits. C61,
C62, and C63 are unused, and have a value of one. C71, C72, and C73 are unused, and have a value of one.
10.6.5.5.2 Receive C-bit DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the C-bit DS3 frame. All of the DS3 overhead bits
X1, X2, P1, P2, MX, FXY, and CXY are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
P1, P2, C31, C32, and C33 bits are output as an error indication (modulo 2 addition of the calculated parity and the
bit). The C13 bit is sent over to the receive FEAC controller. The C51, C52, and C53 bits are sent to the receive HDLC
overhead controller.
10.6.6 M23 DS3 Framer/Formatter
10.6.6.1
Transmit M23 DS3 Frame Processor
The M23 DS3 frame format is shown in Figure 10-13. Table 10-28 defines the framing bits for M23 DS3. X1 and X2
are the Remote Defect Indication (RDI) bits (also referred to as the far-end SEF/AIS bits). P1 and P2 are the parity
bits used for line error monitoring. M1, M2, and M3 are the multiframe alignment bits. FXY are the subframe
alignment bits. C11 is the Application Identification Channel (AIC). CX1, CX2, and CX3 are the stuff control bits for
tributary #X. The X-bit, P-bit, M-bit, C-bit, and F-bit positions are overhead bits, and the remainder of the bit
positions in the T3 frame are payload bits regardless of how they are marked by TDEN.
Table 10-28. M23 DS3 Frame Overhead Bit Definitions
BIT
DEFINITION
X1, X2
Remote Defect Indication
(RDI)
P1, P2
Parity Bits
M1, M2, and M3
Multiframe Alignment Bits
FXY
Subframe Alignment Bits
C11
Application Identification
Channel (AIC)
CX1, CX2, and CX3
Stuff Control Bits for Tributary
#X
10.6.6.2
Transmit M23 DS3 Frame Generation
M23 DS3 frame generation receives the incoming payload data stream, and overwrites all of the DS3 overhead bit
locations.
The multiframe alignment bits (M1, M2, and M3) are overwritten with the values zero, one, and zero (010)
respectively.
The subframe alignment bits (FX1, FX2, FX3, and FX4) are overwritten with the values one, zero, zero, and one (1001)
respectively.
The X-bits (X1 and X2) are both overwritten with the Remote Defect Indicator (RDI). The RDI source is
programmable (automatic, 1, or 0). If the RDI is generated automatically, the X-bits are set to zero when one or
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