參數(shù)資料
型號： DS3120N
廠商： Maxim Integrated Products
文件頁數(shù)： 34/133頁
文件大小： 0K
描述： IC FRAMER T1 28-CHANNEL IND
標(biāo)準(zhǔn)包裝： 1
控制器類型： T1 調(diào)幀器
接口： 并行/串行
電源電壓： 2.97 V ~ 3.63 V
電流 - 電源： 300mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 316-BGA
包裝： 管件
DS3112
129 of 133
14.9
E2 Framing Structure and E12 Multiplexing
The E2 frame structure is made up of four 212-bit sets (
). The four sets are transmitted one
after another (...Set1/Set2/Set3/Set4/Set1...) to make up the complete E2 frame structure. The Frame
Alignment Signal (FAS) is placed in the first 10 bits of Set 1 and is followed by the Remote Alarm
Indication (RAI) bit and a National Bit (Sn). The remainder of Set 1 is filled with bits from the four
tributaries. The four tributaries are bit interleaved starting with a bit from Tributary 1 immediately after
the Sn bit. The first four bits of Sets 2, 3, and 4 are the Justification Control Bits. Bits 5 to 8 of Set 4 are
the Stuffing Bits. The Justification Control bits control when data will be stuffed into the Stuffing Bit
positions. When a majority of the three Justification Control Bits from a particular tributary is set to zero,
the Stuffing Bit position will be used for tributary data. When the Justification Control Bits are majority
decoded to be one, the Stuffing Bit will not be used for tributary data.
14.10
E3 Framing Structure and E23 Multiplexing
The E3 frame structure and the E23 multiplexing scheme are almost identical to the E2 framing structure
and the E12 multiplexing scheme. The E3 frame structure is made up of four 384-bit sets (
The four sets are transmitted one after another (...Set1/Set2/Set3/Set4/Set1...) to make up the complete E3
frame structure. The Frame Alignment Signal (FAS) is placed in the first 10 bits of Set 1 and is followed
by the Remote Alarm Indication (RAI) bit and a National Bit (Sn). The remainder of Set 1 is filled with
bits from the four tributaries. The four tributaries are bit interleaved starting with a bit from Tributary 1
immediately after the Sn bit. The first four bits of Sets 2, 3, and 4 are the Justification Control Bits. Bits 5
to 8 of Set 4 are the Stuffing Bits. The Justification Control bits control when data will be stuffed into the
Stuffing Bit positions. When a majority of the three Justification Control Bits from a particular tributary
is set to zero, the Stuffing Bit position will be used for tributary data. When the Justification Control Bits
are majority decoded to be one, the Stuffing Bit will not be used for tributary data.
相關(guān)PDF資料
PDF描述
DS31256+ IC CTRLR HDLC 256-CHANNEL 256BGA
DS3141+ IC FRAMER DS3/E3 SNGL 144CSBGA
DS31412N IC 12CH DS3/3 FRAMER 349-BGA
DS3150TN IC LIU T3/E3/STS-1 IND 48-TQFP
DS3154N+ IC LIU DS3/E3/STS-1 QD 144CSBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3121 功能描述:IC TGATOR T1-T3 AGGREGATOR RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
DS3121N 功能描述:IC TGATOR T1-T3 AGGREGATOR IND RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
DS31256 功能描述:輸入/輸出控制器接口集成電路 256Ch High Thruput HDLC Cntlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
DS31256+ 功能描述:輸入/輸出控制器接口集成電路 256Ch High Thruput HDLC Cntlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
DS31256B 功能描述:輸入/輸出控制器接口集成電路 256Ch High Thruput HDLC Cntlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*