參數(shù)資料
型號： DS3112DK
廠商： Maxim Integrated Products
文件頁數(shù)： 34/133頁
文件大小： 0K
描述： KIT DEMO FOR DS3112
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1
主要目的： 接口，交叉點開關/多路復用器
已用 IC / 零件： DS3112
已供物品： 板，CD
DS3112
129 of 133
14.9
E2 Framing Structure and E12 Multiplexing
The E2 frame structure is made up of four 212-bit sets (
). The four sets are transmitted one
after another (...Set1/Set2/Set3/Set4/Set1...) to make up the complete E2 frame structure. The Frame
Alignment Signal (FAS) is placed in the first 10 bits of Set 1 and is followed by the Remote Alarm
Indication (RAI) bit and a National Bit (Sn). The remainder of Set 1 is filled with bits from the four
tributaries. The four tributaries are bit interleaved starting with a bit from Tributary 1 immediately after
the Sn bit. The first four bits of Sets 2, 3, and 4 are the Justification Control Bits. Bits 5 to 8 of Set 4 are
the Stuffing Bits. The Justification Control bits control when data will be stuffed into the Stuffing Bit
positions. When a majority of the three Justification Control Bits from a particular tributary is set to zero,
the Stuffing Bit position will be used for tributary data. When the Justification Control Bits are majority
decoded to be one, the Stuffing Bit will not be used for tributary data.
14.10
E3 Framing Structure and E23 Multiplexing
The E3 frame structure and the E23 multiplexing scheme are almost identical to the E2 framing structure
and the E12 multiplexing scheme. The E3 frame structure is made up of four 384-bit sets (
The four sets are transmitted one after another (...Set1/Set2/Set3/Set4/Set1...) to make up the complete E3
frame structure. The Frame Alignment Signal (FAS) is placed in the first 10 bits of Set 1 and is followed
by the Remote Alarm Indication (RAI) bit and a National Bit (Sn). The remainder of Set 1 is filled with
bits from the four tributaries. The four tributaries are bit interleaved starting with a bit from Tributary 1
immediately after the Sn bit. The first four bits of Sets 2, 3, and 4 are the Justification Control Bits. Bits 5
to 8 of Set 4 are the Stuffing Bits. The Justification Control bits control when data will be stuffed into the
Stuffing Bit positions. When a majority of the three Justification Control Bits from a particular tributary
is set to zero, the Stuffing Bit position will be used for tributary data. When the Justification Control Bits
are majority decoded to be one, the Stuffing Bit will not be used for tributary data.
相關PDF資料
PDF描述
RMM10DSEN CONN EDGECARD 20POS .156 EYELET
DS2148DK KIT DESIGN LIU DS2148 3/5V T1/E1
H3CWH-6436G IDC CABLE - HKC64H/AE64G/HPL64H
78M6618-PDU-1 EVAL KIT DS8005
RMM10DSEH CONN EDGECARD 20POS .156 EYELET
相關代理商/技術參數(shù)
參數(shù)描述
DS3112N 功能描述:網(wǎng)絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112N+ 功能描述:網(wǎng)絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112N+W 功能描述:網(wǎng)絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112NC1 制造商:Maxim Integrated Products 功能描述:T3 E3 MULTIPLEXER, 3.3V T3/E3 FRAMER AND M13/E13/G.747 MUX - Rail/Tube
DS3112ND1E 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*