- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄15535 > DM164134 (Microchip Technology)KIT DEV PIC18F4XK22 PDF資料下載
參數(shù)資料
| 型號： | DM164134 |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 58/116頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV PIC18F4XK22 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PIC® 18F |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | PIC18F4XK22，PIC18F2XK22 |
| 所含物品： | 板，文檔 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當(dāng)前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
PIC18FXX8
DS41159E-page 44
2006 Microchip Technology Inc.
4.9
Data Memory Organization
The data memory is implemented as static RAM. Each
register in the data memory has a 12-bit address,
allowing up to 4096 bytes of data memory. Figure 4-6
shows
the
data
memory
organization
for
the
PIC18FXX8 devices.
The data memory map is divided into as many as
16 banks that contain 256 bytes each. The lower 4 bits
of the Bank Select Register (BSR<3:0>) select which
bank will be accessed. The upper 4 bits for the BSR are
not implemented.
The data memory contains Special Function Registers
(SFRs) and General Purpose Registers (GPRs). The
SFRs are used for control and status of the controller
and peripheral functions, while GPRs are used for data
storage and scratchpad operations in the user’s appli-
cation. The SFRs start at the last location of Bank 15
(FFFh) and grow downwards. GPRs start at the first
location of Bank 0 and grow upwards. Any read of an
unimplemented location will read as ‘0’s.
The entire data memory may be accessed directly or
indirectly. Direct addressing may require the use of the
BSR register. Indirect addressing requires the use of
the File Select Register (FSR). Each FSR holds a
12-bit address value that can be used to access any
location in the data memory map without banking.
The instruction set and architecture allow operations
across all banks. This may be accomplished by indirect
addressing or by the use of the MOVFF instruction. The
MOVFF
instruction is a two-word/two-cycle instruction,
that moves a value from one register to another.
To ensure that commonly used registers (SFRs and
select GPRs) can be accessed in a single cycle,
regardless of the current BSR values, an Access Bank
is implemented. A segment of Bank 0 and a segment of
Bank 15 comprise the Access RAM. Section 4.10
“Access Bank” provides a detailed description of the
Access RAM.
4.9.1
GENERAL PURPOSE
REGISTER FILE
The register file can be accessed either directly or
indirectly. Indirect addressing operates through the File
Select Registers (FSR). The operation of indirect
addressing
is
shown
in
Enhanced MCU devices may have banked memory in
the GPR area. GPRs are not initialized by a Power-on
Reset and are unchanged on all other Resets.
Data RAM is available for use as GPR registers by all
instructions. Bank 15 (F00h to FFFh) contains SFRs.
All other banks of data memory contain GPR registers,
starting with Bank 0.
4.9.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 4-1.
The SFRs can be classified into two sets: those asso-
ciated with the “core” function and those related to the
peripheral functions. Those registers related to the
“core” are described in this section, while those related
to the operation of the peripheral features are
described in the section of that peripheral feature.
The
SFRs
are
typically
distributed
among
the
peripherals whose functions they control.
The unused SFR locations will be unimplemented and
read as ‘0’s. See Table 4-1 for addresses for the SFRs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AIUR-07-221K | INDUCTOR POWER 220UH 10% T/H |
| MAX8903CETI+ | IC DC/DC CHARGER LI+ 2A 28-TQFN |
| MAX11080GUU/V+T | IC LI/BATTERY MANAGEMENT 38TSSOP |
| MAX11081GUU+T | IC FAULT MON BATT 12CH 38-TSSOP |
| MAX11081GUU/V+T | IC FAULT MON BATT 12CH 38TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM164135 | 制造商:Microchip Technology Inc 功能描述:KIT, ONEPIC DEMO BOARD, PLUS PICKIT 3 制造商:Microchip Technology Inc 功能描述:KIT, ONEPIC DEMO BOARD, PLUS PICKIT 3; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: Yes 制造商:Microchip Technology Inc 功能描述:One PIC MCU Platform Board with PICkit 3 |
| DM164135 | 制造商:Microchip Technology Inc 功能描述:PICKIT 3 IN-CIRCUIT DEBUGGER |
| DM173001 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC PICDEM 17 PIC17CXX RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| DM180021 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC PIC18 Starter Kit RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| DM1800-434MB | 功能描述:射頻模塊 DM1800 Base Station 433.92 MHz RoHS:否 制造商:Linx Technologies 產(chǎn)品:Transceiver Modules 頻帶:902 MHz to 928 MHz 輸出功率:- 15.5 dBm to + 12.5 dBm 接口類型:UART 工作電源電壓:- 0.3 VDC to + 5.5 VDC 傳輸供電電流:38.1 mA 接收供電電流:22.7 mA 天線連接器類型:U.FL 最大工作溫度:+ 85 C 尺寸:1.15 mm x 0.63 mm x 0.131 mm |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。