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| 型號： | DM164134 |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 57/116頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV PIC18F4XK22 |
| 標準包裝： | 1 |
| 系列： | PIC® 18F |
| 類型： | MCU |
| 適用于相關產品： | PIC18F4XK22，PIC18F2XK22 |
| 所含物品： | 板，文檔 |
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2006 Microchip Technology Inc.
DS41159E-page 43
PIC18FXX8
4.7.1
TWO-WORD INSTRUCTIONS
The PIC18FXX8 devices have 4 two-word instructions:
MOVFF, CALL, GOTO
and LFSR. The 4 Most Signifi-
cant bits of the second word are set to ‘1’s and indicate
a special NOP instruction. The lower 12 bits of the
second word contain the data to be used by the
instruction. If the first word of the instruction is executed,
the data in the second word is accessed. If the second
word of the instruction is executed by itself (first word
was skipped), it will execute as a NOP. This action is
necessary when the two-word instruction is preceded by
a conditional instruction that changes the PC. A program
example that demonstrates this concept is shown in
Summary” for further details of the instruction set.
4.8
Look-up Tables
Look-up tables are implemented two ways. These are:
Computed GOTO
Table Reads
4.8.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL).
A look-up table can be formed with an ADDWF
PCL
instruction and a group of RETLW
0xnn
instructions.
WREG is loaded with an offset into the table before
executing a call to that table. The first instruction of the
called routine is the ADDWF PCL instruction. The next
instruction executed will be one of the RETLW
0xnn
instructions that returns the value 0xnn to the calling
function.
The offset value (value in WREG) specifies the number
of bytes that the program counter should advance.
In this method, only one data byte may be stored in
each instruction location and room on the return
address stack is required.
4.8.2
TABLE READS/TABLE WRITES
A better method of storing data in program memory
allows 2 bytes of data to be stored in each instruction
location.
Look-up table data may be stored as 2 bytes per
program word by using table reads and writes. The
Table Pointer (TBLPTR) specifies the byte address and
the Table Latch (TABLAT) contains the data that is read
from, or written to, program memory. Data is
transferred to/from program memory, one byte at a
time.
A description of the table read/table write operation is
EXAMPLE 4-4:
TWO-WORD INSTRUCTIONS
Note 1: The LSb of PCL is fixed to a value of ‘0’.
Hence, computed GOTO to an odd address
is not possible.
2: The ADDWF
PCL
instruction does not
update PCLATH/PCLATU. A read opera-
tion on PCL must be performed to update
PCLATH and PCLATU.
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; No, execute 2-word instruction
1111 0100 0101 0110
; 2nd operand holds address of REG2
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; Yes
1111 0100 0101 0110
; 2nd operand becomes NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code
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