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參數(shù)資料
| 型號： | DC979A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2442 |
| 軟件下載： | QuikEval System |
| 設計資源： | DC979A Design File DC979A Schematic |
| 標準包裝： | 1 |
| 系列： | QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 8k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2442 |
| 已供物品： | 板 |
| 相關產(chǎn)品： | LTC2442IG#TRPBF-ND - IC ADC 24BIT 250MSPS 36-SSOP LTC2442CG#TRPBF-ND - IC ADC 24BIT 250MSPS 36-SSOP LTC2442IG#PBF-ND - IC ADC 24BIT 4CH 36-SSOP LTC2442CG#PBF-ND - IC ADC 24BIT 4CH 36-SSOP |
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LTC2442
23
2442fa
For more information www.linear.com/LTC2442
If FO is grounded, fS is set by the on-chip oscillator at
1.8MHz ±5% (over supply and temperature variations). At
an OSR of 32,768, the first NULL is at fN = 55Hz and the
no latency output rate is fN/8 = 6.9Hz. At the maximum
OSR,thenoiseperformanceofthedeviceis220nVRMSwith
better than 80dB rejection of 50Hz ±2% and 60Hz ±2%.
Since the OSR is large (32,768) the wide band rejection
is extremely large and the antialiasing requirements are
simple. The first multiple of fS occurs at 55Hz 32,768 =
1.8MHz, see Figure 12.
The first NULL becomes fN = 7.03kHz with an OSR of 256
(anoutputrateof879Hz)andFOgrounded.WhiletheNULL
has shifted, the sample rate remains constant. As a result
of constant modulator sampling rate, the linearity, offset
and full-scale performance remains unchanged as does
the first multiple of fS.
The sample rate fS and NULL fN, may also be adjusted by
driving the FO pin with an external oscillator. The sample
rate is fS = fEOSC/5, where fEOSC is the frequency of the
clock applied to FO. Combining a large OSR with a reduced
sample rate leads to notch frequencies fN near DC while
maintaining simple antialiasing requirements. A 100kHz
clock applied to FO results in a NULL at 0.6Hz plus all
harmonics up to 20kHz, see Figure 13. This is useful in
applications requiring digitalization of the DC component
of a noisy input signal and eliminates the need of placing
a 0.6Hz filter in front of the ADC.
Anexternaloscillatoroperatingfrom100kHzto20MHzcan
be implemented using the LTC1799 (resistor set SOT-23
oscillator), see Figure 14. By floating pin 4 (DIV) of the
LTC1799, the output oscillator frequency is:
fOSC =10MHz
10k
10 RSET
The normal mode rejection characteristic shown in
Figure 13isachievedbyapplyingtheoutputoftheLTC1799
(with RSET = 100k) to the FO pin on the LTC2442 with OSR
= 32,768.
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
–60
–40
0
2442 F12
–80
–100
1000000
2000000
–120
1.8MHz
–140
–20
NORMAL
MODE
REJECTION
(dB)
REJECTION > 120dB
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
–40
–20
0
8
2442 F13
–60
–80
2
4
6
10
–100
–120
–140
NORMAL
MODE
REJECTION
(dB)
Figure 12. Normal Mode Rejection (Internal Oscillator)
Figure 13. Normal Mode Rejection (Internal Oscillator at 90kHz)
applications inForMation
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