国产片在线天堂av,中文字幕熟妇伦伦,国产日韩欧美视频

您好，
買賣IC網(wǎng)歡迎您。
請登錄
免費注冊

您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382924 > DAC1627D1G25 (NXP SEMICONDUCTORS) PDF資料下載

參數(shù)資料

型號：	DAC1627D1G25
廠商：	NXP SEMICONDUCTORS
元件分類：	DAC
中文描述：	PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝：	10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁數(shù)：	67/69頁
文件大?。?/td>	1677K
代理商：	DAC1627D1G25

DAC1627D1G25

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 29 April 2011

67 of 69

continued >>

NXP Semiconductors

DAC1627D1G25

Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating

17. Tables

Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2

Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4

Table 3. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . .6

Table 4. Thermal characteristics . . . . . . . . . . . . . . . . . . .7

Table 5. Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .8

Table 6. Read or Write mode access description . . . . .13

Table 7. Number of bytes to be transferred . . . . . . . . . .13

Table 8. SPI timing characteristics . . . . . . . . . . . . . . . .14

Table 9. Input LVDS bus swapping . . . . . . . . . . . . . . . .16

Table 10. Folded and interleaved format mapping. . . . . .17

Table 11. Compensation delay values for manual

tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Table 12. CDI mode 0: operating modes examples . . . .22

Table 13. CDI mode 1: operating modes examples . . . .22

Table 14. CDI mode 2: operating modes examples . . . .23

Table 15: Interpolation filter coefficients . . . . . . . . . . . . .24

Table 16. Complex modulator operation mode . . . . . . . .26

Table 17. Inversion filter coefficients . . . . . . . . . . . . . . . .27

Table 18. DAC transfer function . . . . . . . . . . . . . . . . . . .28

Table 19. I

O(fs)

coarse adjustment . . . . . . . . . . . . . . . . . .29

Table 20. I

O(fs)

fine adjustment . . . . . . . . . . . . . . . . . . . .29

Table 21. Digital offset adjustment . . . . . . . . . . . . . . . . .30

Table 22. Auxiliary DAC transfer function . . . . . . . . . . . .31

Table 23. Page_00 register allocation map . . . . . . . . . . .38

Table 24. Register COMMON (address 00h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .40

Table 25. Register TXCFG (address 01h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .40

Table 26. Register PLLCFG (address 02h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .41

Table 27. Register FREQNCO_B0 (address 04h) . . . . . .41

Table 28. Register FREQNCO_B1 (address 05h) . . . . . .42

Table 29. Register FREQNCO_B2 (address 06h) . . . . . .42

Table 30. Register FREQNCO_B3 (address 07h) . . . . . .42

Table 31. Register FREQNCO_B4 (address 08h) . . . . . .42

Table 32. Register PH_CORR_CTL0 (address 09h) . . . .42

Table 33. Register PH_CORR_CTL1 (address 0Ah) . . .42

Table 34. Register DAC_A_DGAIN_LSB (address 0Bh) .42

Table 35. Register DAC_A_DGAIN_MSB (address 0Ch) 43

Table 36. Register DAC_B_DGAIN_LSB (address 0Dh) 43

Table 37. Register DAC_B_DGAIN_MSB (address 0Eh) 43

Table 38. Register DAC_OUT_CTRL (address 0Fh) . . .43

Table 39. Register DAC_CLIPPING (address 10h) . . . . .43

Table 40. Register DAC_A_OFFSET_LSB

(address 11h) . . . . . . . . . . . . . . . . . . . . . . . . . .43

Table 41. Register DAC_A_OFFSET_MSB

(address 12h) . . . . . . . . . . . . . . . . . . . . . . . . .44

Table 42. Register DAC_B_OFFSET_LSB

(address 13h) . . . . . . . . . . . . . . . . . . . . . . . . . 44

Table 43. Register DAC_B_OFFSET_MSB

(address 14h) . . . . . . . . . . . . . . . . . . . . . . . . . 44

Table 44. Register PHINCO_LSB (address 15h) . . . . . . 44

Table 45. Register PHINCO_MSB (address 16h) . . . . . . 44

Table 46. Register DAC_A_GAIN1 (address 17h) . . . . . 44

Table 47. Register DAC_A_GAIN2 (address 18h) . . . . . 44

Table 48. Register DAC_B_GAIN1 (address 19h) . . . . . 44

Table 49. Register DAC_B_GAIN2 (address 1Ah) . . . . . 45

Table 50. DAC_A_Aux_MSB register (address 1Bh)