參數(shù)資料
型號: DAC1627D1G25
廠商: NXP SEMICONDUCTORS
元件分類: DAC
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝: 10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁數(shù): 44/69頁
文件大?。?/td> 1677K
代理商: DAC1627D1G25
DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
44 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
Table 41.
Default values are shown highlighted.
Bit
Symbol
7 to 0
DAC_A_OFFSET[15:8]
Register DAC_A_OFFSET_MSB (address 12h)
Access
R/W
Value
Description
DAC A digital offset value
most significant 8 bits for the DAC A digital offset
-
Table 42.
Default values are shown highlighted.
Bit
Symbol
7 to 0
DAC_B_OFFSET[7:0]
Register DAC_B_OFFSET_LSB (address 13h)
Access
R/W
Value
Description
DAC B digital offset value
least significant 8 bits for the DAC B digital offset
-
Table 43.
Default values are shown highlighted.
Bit
Symbol
7 to 0
DAC_B_OFFSET[15:8]
Register DAC_B_OFFSET_MSB (address 14h)
Access
R/W
Value
Description
DAC B digital offset value
most significant 8 bits for the DAC B digital offset
-
Table 44.
Default values are shown highlighted.
Bit
Symbol
7 to 0
PH_NCO[7:0]
Register PHINCO_LSB (address 15h)
Access
R/W
Value
Description
NCO phase offset LSB
least significant 8 bits for the NCO phase setting
-
Table 45.
Default values are shown highlighted.
Bit
Symbol
7 to 0
PH_NCO[15:8]
Register PHINCO_MSB (address 16h)
Access
R/W
Value
Description
NCO phase offset MSB
most significant 8 bits for the NCO phase setting
-
Table 46.
Default values are shown highlighted.
Bit
Symbol
7 to 6
DAC_A_GAIN_COARSE[1:0] R/W
5 to 0
DAC_A_GAIN_FINE[5:0]
Register DAC_A_GAIN1 (address 17h)
Access
Value
-
-
Description
DAC A analog coarse gain control (LSB)
DAC A analog fine gain control
R/W
Table 47.
Default values are shown highlighted.
Bit
Symbol
7 to 6
DAC_A_GAIN_COARSE[3:2] R/W
Register DAC_A_GAIN2 (address 18h)
Access
Value
Description
DAC A analog gain coarse control (MSB)
Table 48.
Default values are shown highlighted.
Bit
Symbol
7 to 6
DAC_B_GAIN_COARSE[1:0] R/W
5 to 0
DAC_B_GAIN_FINE[5:0]
Register DAC_B_GAIN1 (address 19h)
Access
Value
-
-
Description
DAC B analog coarse gain control (LSB)
DAC B analog fine gain control
R/W
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